A Low-Power Routing Architecture Optimized for Deep Sub-Micron FPGAs. - Luca Ciccarelli; Domenico Loparco; Massimiliano Innocenti; Andrea Lodi 002; Claudio Mucci; Pier Luigi Rolandi (CICC, 2006)

System on chip with 1.12mW-32Gb/s AC-coupled 3D memory interface. - Roberto Canegallo; Luca Perugini; Alberto Pasini; Massimiliano Innocenti; Mauro Scandiuzzo; Roberto Guerrieri; Pier Luigi Rolandi (CICC, 2009)

3D capacitive transmission of analog signals with automatic compensation of the voltage attenuation. - Eleonora Franchi; Federico Natali; Antonio Gnudi; Roberto Guerrieri; Massimiliano Innocenti; Luca Ciccarelli; Mauro Scandiuzzo; Roberto Canegallo (ESSCIRC, 2009)