A multi level testability assistant for VLSI design. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Donatella Sciuto; Giuseppe Zaza (EURO-DAC, 1992)

Specification and Formal Synthesis of Digital Circuits. - Massimo Bombana; Patrizia Cavalloro; Giuseppe Zaza (TPHOLs, 1992)

Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Fabrizio Ferrandi; Donatella Sciuto; Giuseppe Zaza (DFT, 1993)

An Expert Solution to Functional Testability Analysis of VLSI Circuits. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Fabrizio Ferrandi; Donatella Sciuto; Giuseppe Zaza (SEKE, 1993)

A design methodology for the correct specification of VLSI systems. - Cristiana Bolchini; Massimo Bombana; Patrizia Cavalloro; Claudio Costi; Franco Fummi; Giuseppe Zaza (Microprocess. Microprogramming, 1993)

Quantitative Evaluation of Formal Based Synthesis in ASIC Design. - G. Bezzi; Massimo Bombana; Patrizia Cavalloro; Salvatore Conigliaro; Giuseppe Zaza (TPCD, 1994)

ALADIN: a multilevel testability analyzer for VLSI system design. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Fabrizio Ferrandi; Donatella Sciuto; Giuseppe Zaza (IEEE Trans. Very Large Scale Integr. Syst., 1994)

Design-Flow and Synthesis for ASICs: A Case Study. - Massimo Bombana; Patrizia Cavalloro; Salvatore Conigliaro; Roger B. Hughes; Gerry Musgrave; Giuseppe Zaza (DAC, 1995)

Property verification in the design of telecom applications. - Massimo Bombana; Patrizia Cavalloro; Fabrizio Ferrandi (ASP-DAC, 1997)

ATM Cell Modelling using Objective VHDL. - Alberto Allara; Massimo Bombana; Patrizia Cavalloro; Wolfgang Nebel; Wolfram Putzke-Röming; Martin Radetzki (ASP-DAC, 1998)

IP-based design of custom field programmable network processors. - Massimo Bombana; Nikolay Fominykh; Giulio Gorla; Alexander Kriajev; Boris Krivosheyin; Juri Rytchagov (ICECS, 1998)

A Case Study in Design Space Exploration: The Tosca Environment Applied to a Telecommunication Link Controller. - Alberto Allara; Massimo Bombana; William Fornaciari; Fabio Salice (IEEE Des. Test Comput., 2000)

SystemC-VHDL Co-Simulation and Synthesis in the HW Domain. - Massimo Bombana; Francesco Bruschi (DATE, 2003)

A Design Methodology for the Exploitation of High Level Communication Synthesis. - Francesco Bruschi; Massimo Bombana (DATE, 2004)