A hierarchical multi-level test generation system. - Antonio Lioy; Massimo Poncino (Great Lakes Symposium on VLSI, 1991)

On the Resetability of Synchronous Sequential Circuits. - Antonio Lioy; Massimo Poncino (ISCAS, 1993)

A study of the resetability of synchronous sequential circuits. - Antonio Lioy; Massimo Poncino (Microprocess. Microprogramming, 1993)

A State Space Decomposition Algorithm for Approximate FSM Traversal. - Hyunwoo Cho; Gary D. Hachtel; Enrico Macii; Massimo Poncino; Fabio Somenzi (EDAC-ETC-EUROASIC, 1994)

An ADD-based algorithm for shortest path back-tracing of large graphs. - R. Iris Bahar; Gary D. Hachtel; Abelardo Pardo; Massimo Poncino; Fabio Somenzi (Great Lakes Symposium on VLSI, 1994)

Re-encoding sequential circuits to reduce power dissipation. - Gary D. Hachtel; Mariano Hermida de la Rica; Abelardo Pardo; Massimo Poncino; Fabio Somenzi (ICCAD, 1994)

A Structural Approach to State Space Decomposition for Approximate Reachability Analysis. - Hyunwoo Cho; Gary D. Hachtel; Enrico Macii; Massimo Poncino; Fabio Somenzi (ICCD, 1994)

Computing the Maximum Power Cycles of a Sequential Circuit. - Srilatha Manne; Abelardo Pardo; R. Iris Bahar; Gary D. Hachtel; Fabio Somenzi; Enrico Macii; Massimo Poncino (DAC, 1995)

Predicting the functional complexity of combinational circuits by symbolic spectral analysis of Boolean functions. - Enrico Macii; Massimo Poncino (EURO-DAC, 1995)

Estimating worst-case power consumption of CMOS circuits modeled as symbolic neural networks. - Enrico Macii; Massimo Poncino (Great Lakes Symposium on VLSI, 1995)

Using symbolic Rademacher-Walsh spectral transforms to evaluate the correlation between Boolean functions. - Enrico Macii; Massimo Poncino (Great Lakes Symposium on VLSI, 1995)

Using connectivity and spectral methods to characterize the structure of sequential logic circuits. - Enrico Macii; Massimo Poncino (Microprocess. Microprogramming, 1995)

Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino; Donatella Sciuto (DAC, 1996)

BDD-based testability estimation of VHDL designs. - Enrico Macii; Massimo Poncino; Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (EURO-DAC, 1996)

Test Generation for Networks of Interacting FSMs Using Symbolic Techniques. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino; Donatella Sciuto (Great Lakes Symposium on VLSI, 1996)

Exact Computation of the Entropy of a Logic Circuit. - Enrico Macii; Massimo Poncino (Great Lakes Symposium on VLSI, 1996)

Enhancing FSM Traversal by Temporary Re-Encoding. - Gianpiero Cabodi; Luciano Lavagno; Enrico Macii; Massimo Poncino; Stefano Quer; Paolo Camurati; Ellen Sentovich (ICCD, 1996)

Automatic state space decomposition for approximate FSM traversal based on circuit analysis. - Hyunwoo Cho; Gary D. Hachtel; Enrico Macii; Massimo Poncino; Fabio Somenzi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

A parallel approach to symbolic traversal based on set partitioning. - Gianpiero Cabodi; Paolo Camurati; Antonio Lioy; Massimo Poncino; Stefano Quer (CHARME, 1997)

Telescopic Units: Increasing the Average Throughput of Pipelined Designs by Adaptive Latency Control. - Luca Benini; Enrico Macii; Massimo Poncino (DAC, 1997)

Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks. - Luca Benini; Giovanni De Micheli; Enrico Macii; Massimo Poncino; Riccardo Scarsi (ED&TC, 1997)

Accurate Entropy Calculation for Large Logic Circuits Based on Output Clustering. - Antonio Lioy; Enrico Macii; Massimo Poncino; Massimo Rossello (Great Lakes Symposium on VLSI, 1997)

Fast power estimation for deterministic input streams. - Luca Benini; Giovanni De Micheli; Enrico Macii; Massimo Poncino; Riccardo Scarsi (ICCAD, 1997)

System-level power optimization of special purpose applications: the beach solution. - Luca Benini; Giovanni De Micheli; Enrico Macii; Massimo Poncino; Stefano Quer (ISLPED, 1997)

Testing Core-Based Systems: A Symbolic Methodology. - Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto; Enrico Macii; Massimo Poncino (IEEE Des. Test Comput., 1997)

Computational Kernels and their Application to Sequential Power Optimization. - Luca Benini; Giovanni De Micheli; Antonio Lioy; Enrico Macii; Giuseppe Odasso; Massimo Poncino (DAC, 1998)

Power Estimation of Behavioral Descriptions. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino (DATE, 1998)

Timed Supersetting and the Synthesis of Telescopic Units. - Luca Benini; Giovanni De Micheli; Antonio Lioy; Enrico Macii; Giuseppe Odasso; Massimo Poncino (Great Lakes Symposium on VLSI, 1998)

Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding. - Luca Benini; Giovanni De Micheli; Alberto Macii; Enrico Macii; Massimo Poncino (Great Lakes Symposium on VLSI, 1998)

Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. - Fabrizio Ferrandi; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi; Fabio Somenzi (ICCAD, 1998)

Telescopic units: a new paradigm for performance optimization of VLSI designs. - Luca Benini; Enrico Macii; Massimo Poncino; Giovanni De Micheli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

Power optimization of core-based systems by address bus encoding. - Luca Benini; Giovanni De Micheli; Enrico Macii; Massimo Poncino; Stefano Quer (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Kernel-Based Power Optimization of RTL Components: Exact and Approximate Extraction Algorithms. - Luca Benini; Giovanni De Micheli; Enrico Macii; Giuseppe Odasso; Massimo Poncino (DAC, 1999)

Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses. - Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (DAC, 1999)

Glitch Power Minimization by Gate Freezing. - Luca Benini; Giovanni De Micheli; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (DATE, 1999)

Region Compression: A New Scheme for Memory Energy Minimization in Embedded Systems. - Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (EUROMICRO, 1999)

Clustered Table-Based Macromodels for RTL Power Estimation. - Roberto Corgnati; Enrico Macii; Massimo Poncino (Great Lakes Symposium on VLSI, 1999)

Regression-Based Macromodeling for Delay Estimation of Behavioral Components. - Alberto Macii; Enrico Macii; Giuseppe Odasso; Massimo Poncino; Riccardo Scarsi (Great Lakes Symposium on VLSI, 1999)

Parameterized RTL power models for combinational soft macros. - Alessandro Bogliolo; Roberto Corgnati; Enrico Macii; Massimo Poncino (ICCAD, 1999)

Selective instruction compression for memory energy reduction in embedded systems. - Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (ISLPED, 1999)

Automatic Synthesis of Large Telescopic Units Based on Near-Minimum Timed Supersetting. - Luca Benini; Giovanni De Micheli; Antonio Lioy; Enrico Macii; Giuseppe Odasso; Massimo Poncino (IEEE Trans. Computers, 1999)

Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers. - Luca Benini; Giovanni De Micheli; Enrico Macii; Massimo Poncino; Riccardo Scarsi (ACM Trans. Design Autom. Electr. Syst., 1999)

Synthesis of application-specific memories for power optimization in embedded systems. - Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (DAC, 2000)

A Discrete-Time Battery Model for High-Level Power Estimation. - Luca Benini; Giuliano Castelli; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (DATE, 2000)

Regression-based RTL power models for controllers. - Luca Benini; Alessandro Bogliolo; Enrico Macii; Massimo Poncino; Mihai Surmei (ACM Great Lakes Symposium on VLSI, 2000)

Supporting system-level power exploration for DSP applications. - Luca Benini; Marco Ferrero; Alberto Macii; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2000)

A recursive algorithm for low-power memory partitioning. - Luca Benini; Alberto Macii; Massimo Poncino (ISLPED, 2000)

Power Macromodeling for a High Quality RT-Level Power Estimation. - Roberto Zafalon; Massimo Rossello; Enrico Macii; Massimo Poncino (ISQED, 2000)

RTL Estimation of Steering Logic Power. - Crina Anton; Pierluigi Civera; Ionel Colonescu; Enrico Macii; Massimo Poncino; Alessandro Bogliolo (PATMOS, 2000)

Power Models for Semi-autonomous RTL Macros. - Alessandro Bogliolo; Enrico Macii; Virgil Mihailovici; Massimo Poncino (PATMOS, 2000)

Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation. - Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Des. Test Comput., 2000)

A multilevel engine for fast power simulation of realistic inputstreams. - Luca Benini; Giovanni De Micheli; Enrico Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Architectures and synthesis algorithms for power-efficient businterfaces. - Luca Benini; Alberto Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Symbolic optimization of interacting controllers based onredundancy identification and removal. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Glitch power minimization by selective gate freezing. - Luca Benini; Giovanni De Micheli; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Very Large Scale Integr. Syst., 2000)

From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip. - Luca Benini; Luca Macchiarulo; Alberto Macii; Enrico Macii; Massimo Poncino (DAC, 2001)

Extending lifetime of portable systems by battery scheduling. - Luca Benini; Giuliano Castelli; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (DATE, 2001)

Fast characterization of RTL power macromodels. - Manuela Anton; Ionel Colonescu; Enrico Macii; Massimo Poncino (ICECS, 2001)

Current-controlled policies for battery-driven dynamic power management. - Giuliano Castelli; Alberto Macii; Enrico Macii; Massimo Poncino (ICECS, 2001)

Low-energy for deep-submicron address buses. - Luca Macchiarulo; Enrico Macii; Massimo Poncino (ISLPED, 2001)

Synthesis of power-managed sequential components based oncomputational kernel extraction. - Luca Benini; Giovanni De Micheli; Antonio Lioy; Enrico Macii; Giuseppe Odasso; Massimo Poncino (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Discrete-time battery models for system-level low-power design. - Luca Benini; Giuliano Castelli; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Parameterized RTL power models for soft macros. - Alessandro Bogliolo; Roberto Corgnati; Enrico Macii; Massimo Poncino (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Stream synthesis for efficient power simulation based on spectral transforms. - Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Memory design techniques for low energy embedded systems. - Alberto Macii; Luca Benini; Massimo Poncino (Kluwer, 2002)

Wire Placement for Crosstalk Energy Minimization in Address Buses. - Luca Macchiarulo; Enrico Macii; Massimo Poncino (DATE, 2002)

Enhanced clustered voltage scaling for low power. - Monica Donno; Luca Macchiarulo; Alberto Macii; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2002)

Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip. - Luca Benini; Davide Bertozzi; Davide Bruni; Nicola Drago; Franco Fummi; Massimo Poncino (ICCD, 2002)

Discharge current steering for battery lifetime optimization. - Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (ISLPED, 2002)

Layout-driven memory synthesis for embedded systems-on-chip. - Luca Benini; Luca Macchiarulo; Alberto Macii; Massimo Poncino (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Minimizing memory access energy in embedded systems by selective instruction compression. - Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Energy-aware design techniques for differential power analysis protection. - Luca Benini; Alberto Macii; Enrico Macii; Elvira Omerbegovic; Fabrizio Pro; Massimo Poncino (DAC, 2003)

A timing-accurate modeling and simulation environment for networked embedded systems. - Franco Fummi; Giovanni Perbellini; Paolo Gallo; Massimo Poncino; Stefano Martini; Fabio Ricciato (DAC, 2003)

Estimation of Bus Performance for a Tuplespace in an Embedded Architecture. - Nicola Drago; Franco Fummi; Marco Monguzzi; Giovanni Perbellini; Massimo Poncino (DATE, 2003)

Improving the Efficiency of Memory Partitioning by Address Clustering. - Alberto Macii; Enrico Macii; Massimo Poncino (DATE, 2003)

A novel architecture for power maskable arithmetic units. - Luca Benini; Alberto Macii; Enrico Macii; Elvira Omerbegovic; Massimo Poncino; Fabrizio Pro (ACM Great Lakes Symposium on VLSI, 2003)

Combining wire swapping and spacing for low-power deep-submicron buses. - Enrico Macii; Massimo Poncino; Sabino Salerno (ACM Great Lakes Symposium on VLSI, 2003)

Increasing the locality of memory access patterns by low-overhead hardware address relocation. - Alberto Macii; Enrico Macii; Massimo Poncino (ISCAS (5), 2003)

Energy-efficient data scrambling on memory-processor interfaces. - Luca Benini; Angelo Galati; Alberto Macii; Enrico Macii; Massimo Poncino (ISLPED, 2003)

A SystemC-based Framework for Properties Incompleteness Evaluation. - Alessandro Fin; Franco Fummi; Massimo Poncino; Graziano Pravadelli (MTV, 2003)

A Statistic Power Model for Non-synthetic RTL Operators. - Maurizio Bruno; Alberto Macii; Massimo Poncino (PATMOS, 2003)

SystemC Cosimulation and Emulation of Multiprocessor SoC Designs. - Luca Benini; Davide Bertozzi; Davide Bruni; Nicola Drago; Franco Fummi; Massimo Poncino (Computer, 2003)

Discharge Current Steering for Battery Lifetime Optimization. - Luca Benini; Davide Bruni; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Computers, 2003)

Energy-aware design of embedded memories: A survey of technologies, architectures, and optimization techniques. - Luca Benini; Alberto Macii; Massimo Poncino (ACM Trans. Embed. Comput. Syst., 2003)

Scheduling battery usage in mobile systems. - Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Very Large Scale Integr. Syst., 2003)

Energy-Efficient Shared Memory Architectures for Multi-Processor Systems-On-Chip. - Kimish Patel; Alberto Macii; Massimo Poncino (Ultra Low-Power Electronics and Design, 2004)

Modeling and Analysis of Heterogeneous Industrial Networks Architectures. - Franco Fummi; Stefano Martini; Marco Monguzzi; Giovanni Perbellini; Massimo Poncino (DATE, 2004)

Native ISS-SystemC Integration for the Co-Simulation of Multi-Processor SoC. - Franco Fummi; Stefano Martini; Giovanni Perbellini; Massimo Poncino (DATE, 2004)

Heterogeneous Co-Simulation of Networked Embedded Systems. - Franco Fummi; Stefano Martini; Giovanni Perbellini; Massimo Poncino; Fabio Ricciato; Maura Turolla (DATE, 2004)

Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC. - Kimish Patel; Enrico Macii; Massimo Poncino (DATE, 2004)

Energy-efficient bus encoding for LCD displays. - Alberto Bocca; Sabino Salerno; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2004)

Cycle-accurate power analysis for multiprocessor systems-on-a-chip. - Mirko Loghi; Massimo Poncino; Luca Benini (ACM Great Lakes Symposium on VLSI, 2004)

Reducing cache misses by application-specific re-configurable indexing. - Kimish Patel; Enrico Macii; Luca Benini; Massimo Poncino (ICCAD, 2004)

DynamoSim: a trace-based dynamically compiled instruction set simulator. - Massimo Poncino; Jianwen Zhu (ICCAD, 2004)

Software/Network Co-Simulation of Heterogeneous Industrial Networks Architectures. - Franco Fummi; Stefano Martini; Marco Monguzzi; Giovanni Perbellini; Massimo Poncino (ICCD, 2004)

Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor. - Mirko Loghi; Luca Benini; Massimo Poncino (ICCD, 2004)

Energy-performance tradeoffs for the shared memory in multi-processor systems-on-chip. - Kimish Patel; Enrico Macii; Massimo Poncino (ISCAS (2), 2004)

Crosstalk energy reduction by temporal shielding. - Sabino Salerno; Enrico Macii; Massimo Poncino (ISCAS (2), 2004)

Limited intra-word transition codes: an energy-efficient bus encoding for LCD display interfaces. - Sabino Salerno; Alberto Bocca; Enrico Macii; Massimo Poncino (ISLPED, 2004)

A Low-Power Encoding Scheme for GigaByte Video Interfaces. - Sabino Salerno; Enrico Macii; Massimo Poncino (PATMOS, 2004)

Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation. - Franco Fummi; Mirko Loghi; Stefano Martini; Marco Monguzzi; Giovanni Perbellini; Massimo Poncino (DATE, 2005)

Tag Overflow Buffering: An Energy-Efficient Cache Architecture. - Mirko Loghi; Paolo Azzoni; Massimo Poncino (DATE, 2005)

Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions. - Mirko Loghi; Massimo Poncino (DATE, 2005)

Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors. - Mirko Loghi; Martin Letis; Luca Benini; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2005)

Zero clustering: an approach to extend zero compression to instruction caches. - Kimish Patel; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2005)

Energy-Efficient Color Approximation for Digital LCD Interfaces. - Andi Nourrachmat; Sabino Salerno; Enrico Macii; Massimo Poncino (ICCD, 2005)

Frame Buffer Energy Optimization by Pixel Prediction. - Kimish Patel; Enrico Macii; Massimo Poncino (ICCD, 2005)

Exploiting Cross-Channel Correlation for Energy-Efficient LCD Bus Encoding. - Ashutosh Chakraborty; Enrico Macii; Massimo Poncino (PATMOS, 2005)

Energy-efficient bus encoding for LCD digital display interfaces. - Sabino Salerno; Enrico Macii; Massimo Poncino (IEEE Trans. Consumer Electron., 2005)

Thermal resilient bounded-skew clock tree optimization methodology. - Ashutosh Chakraborty; Prassanna Sithambaram; Karthik Duraisami; Alberto Macii; Enrico Macii; Massimo Poncino (DATE, 2006)

ISS-centric modular HW/SW co-simulation. - Franco Fummi; Giovanni Perbellini; Mirko Loghi; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2006)

STV-Cache: a leakage energy-efficient architecture for data caches. - Kimish Patel; Luca Benini; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2006)

Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (ISCAS, 2006)

Low-energy pixel approximation for DVI-based LCD interfaces. - A. Nurrachmat; Enrico Macii; Massimo Poncino (ISCAS, 2006)

Synchronization-driven dynamic speed scaling for MPSoCs. - Mirko Loghi; Massimo Poncino; Luca Benini (ISLPED, 2006)

Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (PATMOS, 2006)

Energy-Efficient Value Based Selective Refresh for Embedded DRAMS. - Kimish Patel; Enrico Macii; Massimo Poncino; Luca Benini (J. Low Power Electron., 2006)

Reducing Conflict Misses by Application-Specific Reconfigurable Indexing. - Kimish Patel; Luca Benini; Enrico Macii; Massimo Poncino (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Low-energy RGB color approximation for digital LCD interfaces. - Massimo Poncino; Enrico Macii (IEEE Trans. Consumer Electron., 2006)

Cache coherence tradeoffs in shared-memory MPSoCs. - Mirko Loghi; Massimo Poncino; Luca Benini (ACM Trans. Embed. Comput. Syst., 2006)

Architectural leakage-aware management of partitioned scratchpad memories. - Olga Golubeva; Mirko Loghi; Massimo Poncino; Enrico Macii (DATE, 2007)

Interactive presentation: Efficient computation of discharge current upper bounds for clustered sleep transistor sizing. - Ashoka Visweswara Sathanur; Andrea Calimera; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (DATE, 2007)

Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology. - Andrea Calimera; Antonio Pullini; Ashoka Visweswara Sathanur; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2007)

On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors. - Olga Golubeva; Mirko Loghi; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2007)

Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew. - Karthik Duraisami; Prassanna Sithambaram; Ashoka Visweswara Sathanur; Alberto Macii; Enrico Macii; Massimo Poncino (ISCAS, 2007)

Locality-driven architectural cache sub-banking for leakage energy reduction. - Olga Golubeva; Mirko Loghi; Enrico Macii; Massimo Poncino (ISLPED, 2007)

Timing-driven row-based power gating. - Ashoka Visweswara Sathanur; Antonio Pullini; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (ISLPED, 2007)

SystemC co-simulation for core-based embedded systems. - Franco Fummi; Mirko Loghi; Giovanni Perbellini; Massimo Poncino (Des. Autom. Embed. Syst., 2007)

Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support. - Francesco Poletti; Antonio Poggiali; Davide Bertozzi; Luca Benini; Pol Marchal; Mirko Loghi; Massimo Poncino (IEEE Trans. Computers, 2007)

Power macromodeling of MPSoC message passing primitives. - Mirko Loghi; Luca Benini; Massimo Poncino (ACM Trans. Embed. Comput. Syst., 2007)

A Scalable Algorithmic Framework for Row-Based Power-Gating. - Ashoka Visweswara Sathanur; Antonio Pullini; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (DATE, 2008)

Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits. - Enrico Macii; Letícia Maria Veiras Bolzani; Andrea Calimera; Alberto Macii; Massimo Poncino (DSD, 2008)

Temperature-insensitive synthesis using multi-vt libraries. - Andrea Calimera; Enrico Macii; Massimo Poncino; R. Iris Bahar (ACM Great Lakes Symposium on VLSI, 2008)

Energy efficiency bounds of pulse-encoded buses. - Karthik Duraisami; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2008)

Optimal sleep transistor synthesis under timing and area constraints. - Ashoka Visweswara Sathanur; Antonio Pullini; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2008)

On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits. - Ashoka Visweswara Sathanur; Andrea Calimera; Antonio Pullini; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (ISCAS, 2008)

Reducing leakage power by accounting for temperature inversion dependence in dual-Vt synthesized circuits. - Andrea Calimera; R. Iris Bahar; Enrico Macii; Massimo Poncino (ISLPED, 2008)

Multiple power-gating domain (multi-VGND) architecture for improved leakage power reduction. - Ashoka Visweswara Sathanur; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (ISLPED, 2008)

Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating. - Ashoka Visweswara Sathanur; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (PATMOS, 2008)

Implementation of a thermal management unit for canceling temperature-dependent clock skew variations. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (Integr., 2008)

Thermal-Aware Design Techniques for Nanometer CMOS Circuits. - Andrea Calimera; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; R. Iris Bahar; Alberto Macii; Enrico Macii; Massimo Poncino (J. Low Power Electron., 2008)

Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Enabling concurrent clock and power gating in an industrial design flow. - Letícia Maria Veiras Bolzani; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (DATE, 2009)

NBTI-aware sleep transistor design for reliable power-gating. - Andrea Calimera; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2009)

Using soft-edge flip-flops to compensate NBTI-induced delay degradation. - Karthik Duraisami; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2009)

Energy-optimal synchronization primitives for single-chip multi-processors. - Cesare Ferri; R. Iris Bahar; Mirko Loghi; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2009)

Placement-aware Clustering for Integrated Clock and Power Gating. - Letícia Maria Veiras Bolzani; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (ISCAS, 2009)

NBTI-aware power gating for concurrent leakage and aging optimization. - Andrea Calimera; Enrico Macii; Massimo Poncino (ISLPED, 2009)

Data-Driven Clock Gating for Digital Filters. - Alberto Bonanno; Alberto Bocca; Alberto Macii; Enrico Macii; Massimo Poncino (PATMOS, 2009)

On-chip Thermal Modeling Based on SPICE Simulation. - Wei Liu 016; Andrea Calimera; Alberto Nannarelli; Enrico Macii; Massimo Poncino (PATMOS, 2009)

Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering. - Gaurang Upasani; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (PATMOS, 2009)

Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating. - Ashoka Visweswara Sathanur; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (J. Low Power Electron., 2009)

Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits. - Andrea Calimera; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A cosimulation methodology for HW/SW validation and performance estimation. - Franco Fummi; Mirko Loghi; Massimo Poncino; Graziano Pravadelli (ACM Trans. Design Autom. Electr. Syst., 2009)

Tag Overflow Buffering: Reducing Total Memory Energy by Reduced-Tag Matching. - Mirko Loghi; Paolo Azzoni; Massimo Poncino (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Post-placement temperature reduction techniques. - Wei Liu 016; Alberto Nannarelli; Andrea Calimera; Enrico Macii; Massimo Poncino (DATE, 2010)

An integrated thermal estimation framework for industrial embedded platforms. - Andrea Acquaviva; Andrea Calimera; Alberto Macii; Massimo Poncino; Enrico Macii; Matteo Giaconia; Claudio Parrella (ACM Great Lakes Symposium on VLSI, 2010)

Aging effects of leakage optimizations for caches. - Andrea Calimera; Mirko Loghi; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2010)

Thermal-aware floorplanning exploration for 3D multi-core architectures. - David Cuesta; José Luis Ayala; José Ignacio Hidalgo; Massimo Poncino; Andrea Acquaviva; Enrico Macii (ACM Great Lakes Symposium on VLSI, 2010)

Analysis of NBTI-induced SNM degradation in power-gated SRAM cells. - Andrea Calimera; Enrico Macii; Massimo Poncino (ISCAS, 2010)

Dynamic indexing: concurrent leakage and aging optimization for caches. - Andrea Calimera; Mirko Loghi; Enrico Macii; Massimo Poncino (ISLPED, 2010)

A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits. - Luca Benini; Alberto Bocca; Alberto Bonanno; Alberto Macii; Enrico Macii; Jean-Luc Nagel; Christian Piguet; Massimo Poncino (J. Low Power Electron., 2010)

Dual-Vt assignment policies in ITD-aware synthesis. - Andrea Calimera; R. Iris Bahar; Enrico Macii; Massimo Poncino (Microelectron. J., 2010)

Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Subbanking. - Mirko Loghi; Olga Golubeva; Enrico Macii; Massimo Poncino (IEEE Trans. Computers, 2010)

Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs. - Ashutosh Chakraborty; Karthik Duraisami; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

NBTI-Aware Clustered Power Gating. - Andrea Calimera; Enrico Macii; Massimo Poncino (ACM Trans. Design Autom. Electr. Syst., 2010)

Temperature-Insensitive Dual- Vth Synthesis for Nanometer CMOS Technologies Under Inverse Temperature Dependence. - Andrea Calimera; R. Iris Bahar; Enrico Macii; Massimo Poncino (IEEE Trans. Very Large Scale Integr. Syst., 2010)

System level techniques to improve reliability in high power microcontrollers for automotive applications. - Andrea Acquaviva; Massimo Poncino; Marco Otella; Michele Sciolla (DATE, 2011)

Partitioned cache architectures for reduced NBTI-induced aging. - Andrea Calimera; Mirko Loghi; Enrico Macii; Massimo Poncino (DATE, 2011)

Moving to Green ICT: From stand-alone power-aware IC design to an integrated approach to energy efficient design for heterogeneous electronic systems. - Salvatore Rinaudo; Giuliana Gangemi; Andrea Calimera; Alberto Macii; Massimo Poncino (DATE, 2011)

Buffering of frequent accesses for reduced cache aging. - Andrea Calimera; Mirko Loghi; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2011)

Balanced reconfiguration of storage banks in a hybrid electrical energy storage system. - Younghyun Kim 001; Sangyoung Park; Yanzhi Wang; Qing Xie 001; Naehyuck Chang; Massimo Poncino; Massoud Pedram (ICCAD, 2011)

An On-Chip All-Digital PV-Monitoring Architecture for Digital IPs. - Hossein Karimiyan; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (PATMOS, 2011)

Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating. - Karthikeyan Lingasubramanian; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (PATMOS, 2011)

Power Efficient Variability Compensation Through Clustered Tunable Power-Gating. - Leandro Max de Lima Silva; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

Fast Computation of Discharge Current Upper Bounds for Clustered Power Gating. - Ashoka Visweswara Sathanur; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Row-Based Power-Gating: A Novel Sleep Transistor Insertion Methodology for Leakage Power Optimization in Nanometer CMOS Circuits. - Ashoka Visweswara Sathanur; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Application-specific memory partitioning for joint energy and lifetime optimization. - Haroon Mahmood; Massimo Poncino; Mirko Loghi; Enrico Macii (DATE, 2012)

IR-drop analysis of graphene-based power distribution networks. - Sandeep Miryala; Andrea Calimera; Enrico Macii; Massimo Poncino (DATE, 2012)

Investigating the effects of Inverted Temperature Dependence (ITD) on clock distribution networks. - Alessandro Sassone; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino; Richard Goldman; Vazgen Melikyan; Eduard Babayan; Salvatore Rinaudo (DATE, 2012)

Multiple-source and multiple-destination charge migration in hybrid electrical energy storage systems. - Yanzhi Wang; Qing Xie 001; Massoud Pedram; Younghyun Kim 001; Naehyuck Chang; Massimo Poncino (DATE, 2012)

NBTI effects on tree-like clock distribution networks. - Wei Liu 016; Sandeep Miryala; Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2012)

Energy-optimal caches with guaranteed lifetime. - Mirko Loghi; Haroon Mahmood; Andrea Calimera; Massimo Poncino; Enrico Macii (ISLPED, 2012)

On-Chip NBTI and PBTI Tracking through an All-Digital Aging Monitor Architecture. - Hossein Karimiyan Alidash; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (PATMOS, 2012)

Aging-aware caches with graceful degradation of performance. - Haroon Mahmood; Massimo Poncino; Mirko Loghi; Enrico Macii (VLSI-SoC, 2012)

On-chip process variation-tracking through an all-digital monitoring architecture. - Hossein Karimiyan Alidash; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (IET Circuits Devices Syst., 2012)

Design Techniques and Architectures for Low-Leakage SRAMs. - Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Design Techniques for NBTI-Tolerant Power-Gating Architectures. - Andrea Calimera; Enrico Macii; Massimo Poncino (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

Energy-optimal SRAM supply voltage scheduling under lifetime and error constraints. - Andrea Calimera; Enrico Macii; Massimo Poncino (DAC, 2013)

A verilog-a model for reconfigurable logic gates based on graphene pn-junctions. - Sandeep Miryala; Mehrdad Montazeri; Andrea Calimera; Enrico Macii; Massimo Poncino (DATE, 2013)

SMAC: Smart Systems Co-design. - Nicola Bombieri; Giuliana Drogoudis; Giuliana Gangemi; Renaud Gillon; Enrico Macii; Massimo Poncino; Salvatore Rinaudo; Francesco Stefanni; Dimitrios Trachanis; Mark van Helvoort (DSD, 2013)

Delay model for reconfigurable logic gates based on graphene PN-junctions. - Sandeep Miryala; Andrea Calimera; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2013)

Computer-aided design of electrical energy systems. - Younghyun Kim 001; Donghwa Shin; Massimo Petricca; Sangyoung Park; Massimo Poncino; Naehyuck Chang (ICCAD, 2013)

Exploration of different implementation styles for graphene-based reconfigurable gates. - Sandeep Miryala; Andrea Calimera; Massimo Poncino; Enrico Macii (ICICDT, 2013)

An automated framework for generating variable-accuracy battery models from datasheet information. - Massimo Petricca; Donghwa Shin; Alberto Bocca; Alberto Macii; Enrico Macii; Massimo Poncino (ISLPED, 2013)

A statistical model of cell-to-cell variation in Li-ion batteries for system-level design. - Donghwa Shin; Massimo Poncino; Enrico Macii; Naehyuck Chang (ISLPED, 2013)

Investigating the behavior of physical defects in pn-junction based reconfigurable graphene devices. - Sandeep Miryala; Andrea Calimera; Enrico Macii; Massimo Poncino; Letícia Maria Veiras Bolzani Poehls (LATW, 2013)

Power modeling and characterization of Graphene-based logic gates. - Sandeep Miryala; Andrea Calimera; Enrico Macii; Massimo Poncino (PATMOS, 2013)

A framework with temperature-aware accuracy levels for battery modeling from datasheets. - Massimo Petricca; Donghwa Shin; Alberto Bocca; Alberto Macii; Enrico Macii; Massimo Poncino (PATMOS, 2013)

A fully standard-cell delay measurement circuit for timing variability detection. - Alessandro Sassone; Massimo Petricca; Massimo Poncino; Enrico Macii (PATMOS, 2013)

Modeling and characterization of thermally induced skew on clock distribution networks of nanometric ICs. - Alessandro Sassone; Wei Liu 016; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (Microelectron. J., 2013)

Layout-Driven Post-Placement Techniques for Temperature Reduction and Thermal Gradient Minimization. - Wei Liu 016; Andrea Calimera; Alberto Macii; Enrico Macii; Alberto Nannarelli; Massimo Poncino (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Statistical Battery Models and Variation-Aware Battery Management. - Donghwa Shin; Enrico Macii; Massimo Poncino (DAC, 2014)

A cross-level verification methodology for digital IPs augmented with embedded timing monitors. - Valerio Guarnieri; Massimo Petricca; Alessandro Sassone; Sara Vinco; Nicola Bombieri; Franco Fummi; Enrico Macii; Massimo Poncino (DATE, 2014)

Cache aging reduction with improved performance using dynamically re-sizable cache. - Haroon Mahmood; Massimo Poncino; Enrico Macii (DATE, 2014)

Thermal management of batteries using a hybrid supercapacitor architecture. - Donghwa Shin; Massimo Poncino; Enrico Macii (DATE, 2014)

Pass-XNOR logic: A new logic style for P-N junction based graphene circuits. - Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino (DATE, 2014)

Ultra Low-Power Computation via Graphene-Based Adiabatic Logic Gates. - Sandeep Miryala; Andrea Calimera; Enrico Macii; Massimo Poncino (DSD, 2014)

Modeling of the charging behavior of li-ion batteries based on manufacturer's data. - Alessandro Sassone; Donghwa Shin; Alberto Bocca; Alberto Macii; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2014)

Automated generation of battery aging models from datasheets. - Massimo Petricca; Donghwa Shin; Alberto Bocca; Alberto Macii; Enrico Macii; Massimo Poncino (ICCD, 2014)

Multi-domain simulation as a foundation for the engineering of smart systems: Challenges and the SMAC vision. - Renaud Gillon; Giuliana Gangemi; Michelangelo Grosso; Franco Fummi; Massimo Poncino (ICECS, 2014)

A compact macromodel for the charge phase of a battery with typical charging protocol. - Donghwa Shin; Alessandro Sassone; Alberto Bocca; Alberto Macii; Enrico Macii; Massimo Poncino (ISLPED, 2014)

An open-source framework for formal specification and simulation of electrical energy systems. - Sara Vinco; Alessandro Sassone; Franco Fummi; Enrico Macii; Massimo Poncino (ISLPED, 2014)

A framework for efficient evaluation and comparison of EES Models. - Sara Vinco; Alessandro Sassone; Davide Lasorsa; Enrico Macii; Massimo Poncino (PATMOS, 2014)

Modeling of Physical Defects in PN Junction Based Graphene Devices. - Sandeep Miryala; Matheus Oleiro; Letícia Maria Bolzani Pöhls; Andrea Calimera; Enrico Macii; Massimo Poncino (J. Electron. Test., 2014)

Row-based body-bias assignment for dynamic thermal clock-skew compensation. - Valerio Tenace; Sandeep Miryala; Andrea Calimera; Alberto Macii; Enrico Macii; Massimo Poncino (Microelectron. J., 2014)

Dynamic Indexing: Leakage-Aging Co-Optimization for Caches. - Andrea Calimera; Mirko Loghi; Enrico Macii; Massimo Poncino (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Energy/Lifetime Cooptimization by Cache Partitioning With Graceful Performance Degradation. - Haroon Mahmood; Mirko Loghi; Massimo Poncino; Enrico Macii (IEEE Trans. Very Large Scale Integr. Syst., 2014)

One-pass logic synthesis for graphene-based Pass-XNOR logic circuits. - Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino (DAC, 2015)

Characterizing the Activity Factor in NBTI Aging Models for Embedded Cores. - Yukai Chen; Andrea Calimera; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2015)

Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization. - Sandeep Miryala; Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino; Luca Gaetano Amarù; Giovanni De Micheli; Pierre-Emmanuel Gaillardon (ACM Great Lakes Symposium on VLSI, 2015)

Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions. - Roberto Giorgio Rizzo; Sandeep Miryala; Andrea Calimera; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2015)

An aging-aware battery charge scheme for mobile devices exploiting plug-in time patterns. - Alberto Bocca; Alessandro Sassone; Alberto Macii; Enrico Macii; Massimo Poncino (ICCD, 2015)

An automated design flow for approximate circuits based on reduced precision redundancy. - Daniele Jahier Pagliari; Andrea Calimera; Enrico Macii; Massimo Poncino (ICCD, 2015)

An equation-based battery cycle life model for various battery chemistries. - Alberto Bocca; Alessandro Sassone; Donghwa Shin; Alberto Macii; Enrico Macii; Massimo Poncino (VLSI-SoC, 2015)

A Temperature-Aware Battery Cycle Life Model for Different Battery Chemistries. - Alberto Bocca; Alessandro Sassone; Donghwa Shin; Alberto Macii; Enrico Macii; Massimo Poncino (VLSI-SoC (Selected Papers), 2015)

Addressing the Smart Systems design challenge: The SMAC platform. - Nicola Bombieri; Dimitrios Drogoudis; Giuliana Gangemi; Renaud Gillon; Michelangelo Grosso; Enrico Macii; Massimo Poncino; Salvatore Rinaudo (Microprocess. Microsystems, 2015)

Ultra-low power circuits using graphene p-n junctions and adiabatic computing. - Sandeep Miryala; Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino (Microprocess. Microsystems, 2015)

A Statistical Model-Based Cell-to-Cell Variability Management of Li-ion Battery Pack. - Donghwa Shin; Massimo Poncino; Enrico Macii; Naehyuck Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Serial T0: approximate bus encoding for energy-efficient transmission of sensor signals. - Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino (DAC, 2016)

Low-overhead adaptive constrast enhancement and power reduction for OLEDs. - Daniele Jahier Pagliari; Massimo Poncino; Enrico Macii (DATE, 2016)

CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties. - Ralph Görgen; Kim Grüttner; Fernando Herrera; Pablo Peñil; Julio L. Medina; Eugenio Villar; Gianluca Palermo; William Fornaciari; Carlo Brandolese; Davide Gadioli; Sara Bocchio; Luca Ceva; et al. (DSD, 2016)

IP-XACT for smart systems design: extensions for the integration of functional and extra-functional models. - Sara Vinco; Michele Lora; Enrico Macii; Massimo Poncino (FDL, 2016)

Fast Thermal Simulation using SystemC-AMS. - Yukai Chen; Sara Vinco; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2016)

Approximate Differential Encoding for Energy-Efficient Serial Communication. - Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2016)

Graphene-PLA (GPLA): a Compact and Ultra-Low Power Logic Array Architecture. - Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2016)

A Unified Model of Power Sources for the Simulation of Electrical Energy Systems. - Sara Vinco; Yukai Chen; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2016)

Enabling quasi-adiabatic logic arrays for silicon and beyond-silicon technologies. - Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino (ISCAS, 2016)

A Li-Ion Battery Charge Protocol with Optimal Aging-Quality of Service Trade-off. - Yukai Chen; Alberto Bocca; Alberto Macii; Enrico Macii; Massimo Poncino (ISLPED, 2016)

Frequency domain characterization of batteries for the design of energy storage subsystems. - Yukai Chen; Enrico Macii; Massimo Poncino (VLSI-SoC, 2016)

Multi-function logic synthesis of silicon and beyond-silicon ultra-low power pass-gates circuits. - Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino (VLSI-SoC, 2016)

Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits. - Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino (VLSI-SoC (Selected Papers), 2016)

Quasi-Adiabatic Logic Arrays for Silicon and Beyond-Silicon Energy-Efficient ICs. - Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

A circuit-equivalent battery model accounting for the dependency on load frequency. - Yukai Chen; Enrico Macii; Massimo Poncino (DATE, 2017)

A methodology for the design of dynamic accuracy operators by runtime back bias. - Daniele Jahier Pagliari; Yves Durand; David Coriat; Anca Molnos; Edith Beigné; Enrico Macii; Massimo Poncino (DATE, 2017)

Workload-driven frequency-aware battery sizing. - Yukai Chen; Enrico Macii; Massimo Poncino (ISLPED, 2017)

Optimal content-dependent dynamic brightness scaling for OLED displays. - Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino (PATMOS, 2017)

A Modular Framework for Battery Modeling in Electronic Designs. - Alberto Bocca; Alberto Macii; Massimo Poncino (J. Low Power Electron., 2017)

CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties. - Kim Grüttner; Ralph Görgen; Sören Schreiner; Fernando Herrera; Pablo Peñil; Julio L. Medina; Eugenio Villar; Gianluca Palermo; William Fornaciari; Carlo Brandolese; Davide Gadioli; Emanuele Vitali; et al. (Microprocess. Microsystems, 2017)

A Layered Methodology for the Simulation of Extra-Functional Properties in Smart Systems. - Sara Vinco; Yukai Chen; Franco Fummi; Enrico Macii; Massimo Poncino (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Approximate Energy-Efficient Encoding for Serial Interfaces. - Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino (ACM Trans. Design Autom. Electr. Syst., 2017)

All-digital embedded meters for on-line power estimation. - Daniele Jahier Pagliari; Valentino Peluso; Yukai Chen; Andrea Calimera; Enrico Macii; Massimo Poncino (DATE, 2018)

GIS-based optimal photovoltaic panel floorplanning for residential installations. - Sara Vinco; Lorenzo Bottaccioli; Edoardo Patti; Andrea Acquaviva; Enrico Macii; Massimo Poncino (DATE, 2018)

Battery-aware Design Exploration of Scheduling Policies for Multi-sensor Devices. - Yukai Chen; Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2018)

Optimal Topology-Aware PV Panel Floorplanning with Hybrid Orientation. - Sara Vinco; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2018)

Fundamental Feature Extraction of the Battery Charge Phase from Product Data. - Alberto Bocca; Yukai Chen; Alberto Macii; Massimo Poncino (ISCAS, 2018)

Application-Driven Synthesis of Energy-Efficient Reconfigurable-Precision Operators. - Daniele Jahier Pagliari; Massimo Poncino (ISCAS, 2018)

A Compact PV Panel Model for Cyber-Physical Systems in Smart Cities. - Sara Vinco; Lorenzo Bottaccioli; Edoardo Patti; Andrea Acquaviva; Massimo Poncino (ISCAS, 2018)

Battery-Aware Energy Model of Drone Delivery Tasks. - Donkyu Baek; Yukai Chen; Alberto Bocca; Alberto Macii; Enrico Macii; Massimo Poncino (ISLPED, 2018)

Dynamic Bit-width Reconfiguration for Energy-Efficient Deep Learning Hardware. - Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino (ISLPED, 2018)

iSTEP, an Integrated Self-Tuning Engine for Predictive Maintenance in Industry 4.0. - Daniele Apiletti; Claudia Barberis; Tania Cerquitelli; Alberto Macii; Enrico Macii; Massimo Poncino; Francesco Ventura (ISPA/IUCC/BDCloud/SocialCom/SustainCom, 2018)

Aging and Cost Optimal Residential Charging for Plug-In EVs. - Alberto Bocca; Yukai Chen; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Des. Test, 2018)

Composable Battery Model Templates Based on Manufacturers' Data. - Alberto Bocca; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Des. Test, 2018)

Empirical derivation of upper and lower bounds of NBTI aging for embedded cores. - Yukai Chen; Enrico Macii; Massimo Poncino (Microelectron. Reliab., 2018)

LAPSE: Low-Overhead Adaptive Power Saving and Contrast Enhancement for OLEDs. - Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino (IEEE Trans. Image Process., 2018)

Thermal Management of Batteries Using Supercapacitor Hybrid Architecture With Idle Period Insertion Strategy. - Donghwa Shin; Massimo Poncino; Enrico Macii (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Low-Overhead Power Trace Obfuscation for Smart Meter Privacy. - Daniele Jahier Pagliari; Sara Vinco; Enrico Macii; Massimo Poncino (DAC, 2019)

Irradiance-Driven Partial Reconfiguration of PV Panels. - Daniele Jahier Pagliari; Sara Vinco; Enrico Macii; Massimo Poncino (DATE, 2019)

Dynamic Beam Width Tuning for Energy-Efficient Recurrent Neural Networks. - Daniele Jahier Pagliari; Francesco Panini; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2019)

A Semi-Empirical Model of PV Modules Including Manufacturing I-V Mismatch. - Yukai Chen; Sara Vinco; Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino (ICECS, 2019)

Optimal Input-Dependent Edge-Cloud Partitioning for RNN Inference. - Daniele Jahier Pagliari; Roberta Chiaro; Yukai Chen; Enrico Macii; Massimo Poncino (ICECS, 2019)

Battery-Aware Electric Truck Delivery Route Planner. - Donkyu Baek; Yukai Chen; Enrico Macii; Massimo Poncino; Naehyuck Chang (ISLPED, 2019)

CNN-Based Camera-less User Attention Detection for Smartphone Power Management. - Daniele Jahier Pagliari; Matteo Ansaldi; Enrico Macii; Massimo Poncino (ISLPED, 2019)

A SystemC-AMS Framework for the Design and Simulation of Energy Management in Electric Vehicles. - Yukai Chen; Donkyu Baek; Jaemin Kim; Santa Di Cataldo; Naehyuck Chang; Enrico Macii; Sara Vinco; Massimo Poncino (IEEE Access, 2019)

Automated Synthesis of Energy-Efficient Reconfigurable-Precision Circuits. - Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino (IEEE Access, 2019)

Fine-Grain Back Biasing for the Design of Energy-Quality Scalable Operators. - Daniele Jahier Pagliari; Yves Durand; David Coriat; Edith Beigné; Enrico Macii; Massimo Poncino (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

SystemC-AMS Thermal Modeling for the Co-simulation of Functional and Extra-Functional Properties. - Yukai Chen; Sara Vinco; Enrico Macii; Massimo Poncino (ACM Trans. Design Autom. Electr. Syst., 2019)

A Cross-level Verification Methodology for Digital IPs Augmented with Embedded Timing Monitors. - Sara Vinco; Nicola Bombieri; Daniele Jahier Pagliari; Franco Fummi; Enrico Macii; Massimo Poncino (ACM Trans. Design Autom. Electr. Syst., 2019)

Battery-Aware Operation Range Estimation for Terrestrial and Aerial Electric Vehicles. - Donkyu Baek; Yukai Chen; Alberto Bocca; Lorenzo Bottaccioli; Santa Di Cataldo; Valentina Gatteschi; Daniele Jahier Pagliari; Edoardo Patti; Gianvito Urgese; Naehyuck Chang; Alberto Macii; Enrico Macii; et al. (IEEE Trans. Veh. Technol., 2019)

Optimal Configuration and Placement of PV Systems in Building Roofs with Cost Analysis. - Matteo Orlando; Lorenzo Bottaccioli; Edoardo Patti; Enrico Macii; Sara Vinco; Massimo Poncino (COMPSAC, 2020)

Input-Dependent Edge-Cloud Mapping of Recurrent Neural Networks Inference. - Daniele Jahier Pagliari; Roberta Chiaro; Yukai Chen; Sara Vinco; Enrico Macii; Massimo Poncino (DAC, 2020)

A Diode-Aware Model of PV Modules from Datasheet Specifications. - Sara Vinco; Yukai Chen; Enrico Macii; Massimo Poncino (DATE, 2020)

Predicting Hard Disk Failures in Data Centers Using Temporal Convolutional Neural Networks. - Alessio Burrello; Daniele Jahier Pagliari; Andrea Bartolini; Luca Benini; Enrico Macii; Massimo Poncino (Euro-Par Workshops, 2020)

Energy-Efficient Adaptive Machine Learning on IoT End-Nodes With Class-Dependent Confidence. - Francesco Daghero; Alessio Burrello; Daniele Jahier Pagliari; Luca Benini; Enrico Macii; Massimo Poncino (ICECS, 2020)

Logic Synthesis of Pass-Gate Logic Circuits With Emerging Ambipolar Technologies. - Valerio Tenace; Andrea Calimera; Enrico Macii; Massimo Poncino (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Modeling and Simulation of Cyber-Physical Electrical Energy Systems With SystemC-AMS. - Yukai Chen; Sara Vinco; Daniele Jahier Pagliari; Paolo Montuschi; Enrico Macii; Massimo Poncino (IEEE Trans. Sustain. Comput., 2020)

Ultra-compact binary neural networks for human activity recognition on RISC-V processors. - Francesco Daghero; Chen Xie; Daniele Jahier Pagliari; Alessio Burrello; Marco Castellano; Luca Gandolfi; Andrea Calimera; Enrico Macii; Massimo Poncino (CF, 2021)

Design of District-level Photovoltaic Installations for Optimal Power Production and Economic Benefit. - Matteo Orlando; Lorenzo Bottaccioli; Sara Vinco; Enrico Macii; Massimo Poncino; Edoardo Patti (COMPSAC, 2021)

Pruning In Time (PIT): A Lightweight Network Architecture Optimizer for Temporal Convolutional Networks. - Matteo Risso; Alessio Burrello; Daniele Jahier Pagliari; Francesco Conti 001; Lorenzo Lamberti; Enrico Macii; Luca Benini; Massimo Poncino (DAC, 2021)

Digital Twin Extension with Extra-Functional Properties. - Khaled Alamin; Sara Vinco; Massimo Poncino; Nicola Dall'Ora; Enrico Fraccaroli; Davide Quaglia (DATE, 2021)

Robust and Energy-Efficient PPG-Based Heart-Rate Monitoring. - Matteo Risso; Alessio Burrello; Daniele Jahier Pagliari; Simone Benatti; Enrico Macii; Luca Benini; Massimo Poncino (ISCAS, 2021)

TCN Mapping Optimization for Ultra-Low Power Time-Series Edge Inference. - Alessio Burrello; Alberto Dequino; Daniele Jahier Pagliari; Francesco Conti 001; Marcello Zanghieri; Enrico Macii; Luca Benini; Massimo Poncino (ISLPED, 2021)

ACME: An Energy-Efficient Approximate Bus Encoding for I2C. - Chen Xie; Daniele Jahier Pagliari; Andrea Calimera; Enrico Macii; Massimo Poncino (ISLPED, 2021)

Adaptive Random Forests for Energy-Efficient Inference on Microcontrollers. - Francesco Daghero; Alessio Burrello; Chen Xie; Luca Benini; Andrea Calimera; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (VLSI-SoC, 2021)

Low-Overhead Early-Stopping Policies for Efficient Random Forests Inference on Microcontrollers. - Francesco Daghero; Alessio Burrello; Chen Xie; Luca Benini; Andrea Calimera; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (VLSI-SoC (Selected Papers), 2021)

Chapter Eight - Energy-efficient deep learning inference on edge devices. - Francesco Daghero; Daniele Jahier Pagliari; Massimo Poncino (Adv. Comput., 2021)

Enhancing manufacturing intelligence through an unsupervised data-driven methodology for cyclic industrial processes. - Tania Cerquitelli; Francesco Ventura; Daniele Apiletti; Elena Baralis; Enrico Macii; Massimo Poncino (Expert Syst. Appl., 2021)

Manufacturing as a Data-Driven Practice: Methodologies, Technologies, and Tools. - Tania Cerquitelli; Daniele Jahier Pagliari; Andrea Calimera; Lorenzo Bottaccioli; Edoardo Patti; Andrea Acquaviva; Massimo Poncino (Proc. IEEE, 2021)

Q-PPG: Energy-Efficient PPG-Based Heart Rate Monitoring on Wearable Devices. - Alessio Burrello; Daniele Jahier Pagliari; Matteo Risso; Simone Benatti; Enrico Macii; Luca Benini; Massimo Poncino (IEEE Trans. Biomed. Circuits Syst., 2021)

CRIME: Input-Dependent Collaborative Inference for Recurrent Neural Networks. - Daniele Jahier Pagliari; Roberta Chiaro; Enrico Macii; Massimo Poncino (IEEE Trans. Computers, 2021)

Low-Overhead Adaptive Brightness Scaling for Energy Reduction in OLED Displays. - Daniele Jahier Pagliari; Santa Di Cataldo; Edoardo Patti; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Emerg. Top. Comput., 2021)

Assessing the Impact of Sensor-Based Task Scheduling on Battery Lifetime in IoT Devices. - Yukai Chen; Wenlong Wang; Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino (IEEE Trans. Instrum. Meas., 2021)

A Microservices-Based Framework for Smart Design and Optimization of PV Installations. - Sara Vinco; Daniele Jahier Pagliari; Lorenzo Bottaccioli; Edoardo Patti; Enrico Macii; Massimo Poncino (IEEE Trans. Sustain. Comput., 2021)

Improving PPG-based Heart-Rate Monitoring with Synthetically Generated Data. - Alessio Burrello; Daniele Jahier Pagliari; Marzia Bianco; Enrico Macii; Luca Benini; Massimo Poncino; Simone Benatti (BioCAS, 2022)

A Machine Learning-based Digital Twin for Electric Vehicle Battery Modeling. - Khaled Sidahmed Sidahmed Alamin; Yukai Chen; Enrico Macii; Massimo Poncino; Sara Vinco (COINS, 2022)

Bioformers: Embedding Transformers for Ultra-Low Power sEMG-based Gesture Recognition. - Alessio Burrello; Francesco Bianco Morghet; Moritz Scherer 001; Simone Benatti; Luca Benini; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (DATE, 2022)

Quality inspection of critical aircraft engine components: towards full automation. - Davide Cannizzaro; Filomena Simone; Klaus Illgner-Fehns; Sara Mata; Ivan Mondino; Alberto Ghiazza; Massimo Poncino; Santa Di Cataldo (ETFA, 2022)

Channel-wise Mixed-precision Assignment for DNN Inference on Constrained Edge Nodes. - Matteo Risso; Alessio Burrello; Luca Benini; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (IGSC, 2022)

C-NMT: A Collaborative Inference Framework for Neural Machine Translation. - Yukai Chen; Roberta Chiaro; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (ISCAS, 2022)

Privacy-preserving Social Distance Monitoring on Microcontrollers with Low-Resolution Infrared Sensors and CNNs. - Chen Xie; Francesco Daghero; Yukai Chen; Marco Castellano; Luca Gandolfi; Andrea Calimera; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (ISCAS, 2022)

Multi-Complexity-Loss DNAS for Energy-Efficient and Memory-Constrained Deep Neural Networks. - Matteo Risso; Alessio Burrello; Luca Benini; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (ISLPED, 2022)

Two-stage Human Activity Recognition on Microcontrollers with Decision Trees and CNNs. - Francesco Daghero; Daniele Jahier Pagliari; Massimo Poncino (PRIME, 2022)

Embedding Temporal Convolutional Networks for Energy-efficient PPG-based Heart Rate Monitoring. - Alessio Burrello; Daniele Jahier Pagliari; Pierangelo Maria Rapa; Matilde Semilia; Matteo Risso; Tommaso Polonelli; Massimo Poncino; Luca Benini; Simone Benatti (ACM Trans. Comput. Heal., 2022)

A Smart Meter Infrastructure for Smart Grid IoT Applications. - Matteo Orlando; Abouzar Estebsari; Enrico Pons; Marco Pau; Stefano Quer; Massimo Poncino; Lorenzo Bottaccioli; Edoardo Patti (IEEE Internet Things J., 2022)

Traffic Load Estimation from Structural Health Monitoring sensors using supervised learning. - Alessio Burrello; Giovanni Zara; Luca Benini; Davide Brunelli; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (Sustain. Comput. Informatics Syst., 2022)

Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks. - Francesco Daghero; Alessio Burrello; Chen Xie; Marco Castellano; Luca Gandolfi; Andrea Calimera; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (ACM Trans. Embed. Comput. Syst., 2022)

Digital Transformation of a Production Line: Network Design, Online Data Collection and Energy Monitoring. - Nicola Dall'Ora; Khaled Alamin; Enrico Fraccaroli; Massimo Poncino; Davide Quaglia; Sara Vinco (IEEE Trans. Emerg. Top. Comput., 2022)

Energy-efficient Wearable-to-Mobile Offload of ML Inference for PPG-based Heart-Rate Estimation. - Alessio Burrello; Matteo Risso; Noemi Tomasello; Yukai Chen; Luca Benini; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (DATE, 2023)

Model-Driven Dataset Generation for Data-Driven Battery SOH Models. - Khaled Sidahmed Sidahmed Alamin; Francesco Daghero; Giovanni Pollo; Daniele Jahier Pagliari; Yukai Chen; Enrico Macii; Massimo Poncino; Sara Vinco (ISLPED, 2023)

Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference. - Matteo Risso; Alessio Burrello; Giuseppe Maria Sarda; Luca Benini; Enrico Macii; Massimo Poncino; Marian Verhelst; Daniele Jahier Pagliari (ISLPED, 2023)

Reducing the Energy Consumption of sEMG-Based Gesture Recognition at the Edge Using Transformers and Dynamic Inference. - Chen Xie; Alessio Burrello; Francesco Daghero; Luca Benini; Andrea Calimera; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (Sensors, 2023)

Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge. - Matteo Risso; Alessio Burrello; Francesco Conti 001; Lorenzo Lamberti; Yukai Chen; Luca Benini; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (IEEE Trans. Computers, 2023)

Multi-Criteria Coordinated Electric Vehicle-Drone Hybrid Delivery Service Planning. - Young Hoo Cho; Donkyu Baek; Yukai Chen; Min Jae Jung; Sara Vinco; Enrico Macii; Massimo Poncino (IEEE Trans. Veh. Technol., 2023)

Efficient Deep Learning Models for Privacy-Preserving People Counting on Low-Resolution Infrared Arrays. - Chen Xie; Francesco Daghero; Yukai Chen; Marco Castellano; Luca Gandolfi; Andrea Calimera; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (IEEE Internet Things J., 2023)

A Framework for Economic and Environmental Benefit Through Renewable Energy Community. - Matteo Orlando; Lorenzo Bottaccioli; Stefano Quer; Massimo Poncino; Sara Vinco; Edoardo Patti (IEEE Syst. J., 2023)

Optimization and Deployment of Deep Neural Networks for PPG-based Blood Pressure Estimation Targeting Low-power Wearables. - Alessio Burrello; Francesco Carlucci; Giovanni Pollo; Xiaying Wang; Massimo Poncino; Enrico Macii; Luca Benini; Daniele Jahier Pagliari (BioCAS, 2024)

Integrating SystemC-AMS Power Modeling with a RISC-V ISS for Virtual Prototyping of Battery-operated Embedded Devices. - Mohamed Amine Hamdi; Giovanni Pollo; Matteo Risso; Germain Haugou; Alessio Burrello; Enrico Macii; Massimo Poncino; Sara Vinco; Daniele Jahier Pagliari (CF (Companion), 2024)

Model-Driven Feature Engineering for Data-Driven Battery SOH Model. - Khaled Alamin; Daniele Jahier Pagliari; Yukai Chen; Enrico Macii; Sara Vinco; Massimo Poncino (DATE, 2024)

HW-SW Optimization of DNNs for Privacy-Preserving People Counting on Low-Resolution Infrared Arrays. - Matteo Risso; Chen Xie; Francesco Daghero; Alessio Burrello; Seyedmorteza Mollaei; Marco Castellano; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (DATE, 2024)

Optimized Deployment of Deep Neural Networks for Visual Pose Estimation on Nano-drones. - Matteo Risso; Francesco Daghero; Beatrice Alessandra Motetti; Daniele Jahier Pagliari; Enrico Macii; Massimo Poncino; Alessio Burrello (ERF (1), 2024)

Accelerating Depthwise Separable Convolutions on Ultra-Low-Power Devices. - Francesco Daghero; Alessio Burrello; Massimo Poncino; Enrico Macii; Daniele Jahier Pagliari (SAMOS, 2024)

Foundation Models for Structural Health Monitoring. - Luca Benfenati; Daniele Jahier Pagliari; Luca Zanatta; Yhorman Alexander Bedoya Velez; Andrea Acquaviva; Massimo Poncino; Enrico Macii; Luca Benini; Alessio Burrello (CoRR, 2024)

Joint Pruning and Channel-wise Mixed-Precision Quantization for Efficient Deep Neural Networks. - Beatrice Alessandra Motetti; Matteo Risso; Alessio Burrello; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari (CoRR, 2024)

EnhancePPG: Improving PPG-based Heart Rate Estimation with Self-Supervision and Augmentation. - Luca Benfenati; Sofia Belloni; Alessio Burrello; Panagiotis Kasnesis; Xiaying Wang; Luca Benini; Massimo Poncino; Enrico Macii; Daniele Jahier Pagliari (CoRR, 2024)

Dynamic Decision Tree Ensembles for Energy-Efficient Inference on IoT Edge Nodes. - Francesco Daghero; Alessio Burrello; Enrico Macii; Paolo Montuschi; Massimo Poncino; Daniele Jahier Pagliari (IEEE Internet Things J., 2024)

Energy-Aware Error Correction Method for Indoor Positioning and Tracking. - Donguk Kim; Donkyu Baek; Yukai Chen; Enrico Macii; Massimo Poncino (DATE, 2025)

Coupling Neural Networks and Physics Equations For Li-Ion Battery State-of-Charge Prediction. - Giovanni Pollo; Alessio Burrello; Enrico Macii; Massimo Poncino; Sara Vinco; Daniele Jahier Pagliari (DATE, 2025)

Building Damage Assessment in Conflict Zones: A Deep Learning Approach Using Geospatial Sub-Meter Resolution Data. - Matteo Risso; Alessia Goffi; Beatrice Alessandra Motetti; Alessio Burrello; Jean Baptiste Bove; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari; Giuseppe Maffeis (IPAS, 2025)

Lightweight Software Kernels and Hardware Extensions for Efficient Sparse Deep Neural Networks on Microcontrollers. - Francesco Daghero; Daniele Jahier Pagliari; Francesco Conti 001; Luca Benini; Massimo Poncino; Alessio Burrello (CoRR, 2025)

MEbots: Integrating a RISC-V Virtual Platform with a Robotic Simulator for Energy-aware Design. - Giovanni Pollo; Mohamed Amine Hamdi; Matteo Risso; Lorenzo Ruotolo; Pietro Furbatto; Matteo Isoldi; Yukai Chen; Alessio Burrello; Enrico Macii; Massimo Poncino; Daniele Jahier Pagliari; Sara Vinco (CoRR, 2025)