Emerging nanoscale silicon devices taking advantage of nanostructure physics. - Toshiro Hiramoto; Masumi Saitoh; Gen Tsutsui (IBM J. Res. Dev., 2006)

New layout design methodology for monolithically integrated 3D CMOS logic circuits based on parasitics engineering. - Chika Tanaka; Keiji Ikeda; Masumi Saitoh (ESSDERC, 2015)

BSIM4 parameter extraction for tri-gate Si nanowire transistors. - Chika Tanaka; Masumi Saitoh; Kensuke Ota; Takayuki Ishikawa; Toshinori Numata (Microelectron. J., 2016)

Emerging Non-Volatile Memory and Thin-Film Transistor Technologies for Future 3D-LSI. - Masumi Saitoh; Shosuke Fujii; Minoru Oda; Marina Yamaguchi; Shoichi Kabuyanagi; Yoko Yoshimura; Kensuke Ota; Kiwamu Sakuma; Yuuichi Kamimuta (ESSDERC, 2018)

Impact of specific failure mechanisms on endurance improvement for HfO2-based ferroelectric tunnel junction memory. - Marina Yamaguchi; Shosuke Fujii; Yuuichi Kamimuta; Shoichi Kabuyanagi; Tsunehiro Ino; Yasushi Nakasaki; Riichiro Takaishi; Reika Ichihara; Masumi Saitoh (IRPS, 2018)

Hot carrier degradation, TDDB, and 1/f noise in Poly-Si Tri-gate nanowire transistor. - Yoko Yoshimura; Kensuke Ota; Masumi Saitoh (IRPS, 2018)

Ag Ionic Memory Cell Technology for Terabit-Scale High-DensityApplication. - Shosuke Fujii; Reika Ichihara; Takuya Konno; Marina Yamaguchi; Harumi Seki; Hiroki Tanaka; Dandan Zhao; Yoko Yoshimura; Masumi Saitoh; Masato Koyama (VLSI Circuits, 2019)

Breakdown Lifetime Analysis of HfO2-based Ferroelectric Tunnel Junction (FTJ) Memory for In-Memory Reinforcement Learning. - Marina Yamaguchi; Shosuke Fujii; Kensuke Ota; Masumi Saitoh (IRPS, 2020)

Novel Operation Scheme for Suppressing Disturb in HfO2-based FeFET Considering Charge- Trapping-Coupled Polarization Dynamics. - Takamasa Hamai; Kunifumi Suzuki; Reika Ichihara; Yusuke Higashi; Yoko Yoshimura; Kiwamu Sakuma; Kensuke Ota; Kota Takahashi; Kazuhiro Matsuo; Shosuke Fujii; Masumi Saitoh (IRPS, 2023)

Comprehensive Analysis of Hole-Trapping in SiN Films with a Wide Range of Time Constants Based on Dynamic C-V. - Harumi Seki; Reika Ichihara; Yusuke Higashi; Yasushi Nakasaki; Masumi Saitoh; Masamichi Suzuki (IRPS, 2023)

A Vertical Channel-All-Around FeFET with Thermally Stable Oxide Semiconductor Achieving High ΔIon> 2µA/cell for 3D Stackable 4F2 High Speed Memory. - Shoichi Kabuyanagi; Takamasa Hamai; Masayuki Murase; Takeru Maeda; Masumi Saitoh; Shosuke Fujii (VLSI Technology and Circuits, 2024)

Cycling Induced Imprint Phenomenon at Intermediate State used for Multi-Level Operation in HfO2-FeFET. - Viktoria Schlykow; Kunifumi Suzuki; Yoko Yoshimura; Hidesato Ishida; Kiwamu Sakuma; Kazuhiro Matsuo; Masumi Saitoh; Reika Ichihara (IRPS, 2025)