FAUST: Design and implementation of a pipelined RISC-V vector floating-point unit. - Mate Kovac; Leon Dragic; Branimir Malnar; Francesco Minervini; Oscar Palomar; Carlos Rojas; Mauro Olivieri; Josip Knezovic; Mario Kovac (Microprocess. Microsystems, 2023)

Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications. - Francesco Minervini; Oscar Palomar; Osman S. Unsal; Enrico Reggiani; Josue V. Quiroga; Joan Marimon; Carlos Rojas; Roger Figueras; Abraham Ruiz; Alberto González 004; Jonnatan Mendoza; Iván Vargas; et al. (ACM Trans. Archit. Code Optim., 2023)