Optimization of Structural Adders in Fixed Coefficient Transposed Direct Form FIR Filters. - Mathias Faust; Chip-Hong Chang (ISCAS, 2009)

Minimal Logic Depth adder tree optimization for Multiple Constant Multiplication. - Mathias Faust; Chip-Hong Chang (ISCAS, 2010)

On "A New Common Subexpression Elimination Algorithm for Realizing Low-Complexity Higher Order Digital Filters". - Chip-Hong Chang; Mathias Faust (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Low error bit width reduction for structural adders of FIR filters. - Mathias Faust; Chip-Hong Chang (ECCTD, 2011)

Bit-parallel Multiple Constant Multiplication using Look-Up Tables on FPGA. - Mathias Faust; Chip-Hong Chang (ISCAS, 2011)

Sign-Extension Avoidance and Word-Length Optimization by Positive-Offset Representation for FIR Filter Design. - Ruimin Huang; Chip-Hong Chang; Mathias Faust; Niklas Lotze; Yiannos Manoli (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

Pipelined adder graph optimization for high speed multiple constant multiplication. - Martin Kumm; Peter Zipf; Mathias Faust; Chip-Hong Chang (ISCAS, 2012)

Efficient structural adder pipelining in transposed form FIR filters. - Mathias Faust; Martin Kumm; Chip-Hong Chang; Peter Zipf (DSP, 2015)

Tap Delay-and-Accumulate Cost Aware Coefficient Synthesis Algorithm for the Design of Area-Power Efficient FIR Filters. - Jiajia Chen 002; Chip-Hong Chang; Jiatao Ding; Rui Qiao; Mathias Faust (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)