Using Higher Levels of Abstraction for Solving Optimization Problems by Boolean Satisfiability. - Robert Wille; Daniel Große; Mathias Soeken; Rolf Drechsler (ISVLSI, 2008)

Reducing the number of lines in reversible circuits. - Robert Wille; Mathias Soeken; Rolf Drechsler (DAC, 2010)

Window optimization of reversible and quantum circuits. - Mathias Soeken; Robert Wille; Gerhard W. Dueck; Rolf Drechsler (DDECS, 2010)

Hierarchical synthesis of reversible circuits using positive and negative Davio decomposition. - Mathias Soeken; Robert Wille; Rolf Drechsler (IDT, 2010)

Verifying UML/OCL Models Using Boolean Satisfiability. - Mathias Soeken; Robert Wille; Mirco Kuhlmann; Martin Gogolla; Rolf Drechsler (MBMV, 2010)

Verifying dynamic aspects of UML models. - Mathias Soeken; Robert Wille; Rolf Drechsler (DATE, 2011)

Automatic property generation for the formal verification of bus bridges. - Mathias Soeken; Ulrich Kühne; Martin Freibothe; Görschwin Fey; Rolf Drechsler (DDECS, 2011)

Towards Automatic Property Generation for the Formal Verification of Bus Bridges. - Mathias Soeken; Ulrich Kühne; Martin Freibothe; Görschwin Fey; Rolf Drechsler (MBMV, 2011)

Designing a RISC CPU in Reversible Logic. - Robert Wille; Mathias Soeken; Daniel Große; Eleonora Schönborn; Rolf Drechsler (MBMV, 2011)

Towards automatic determination of problem bounds for object instantiation in static model verification. - Mathias Soeken; Robert Wille; Rolf Drechsler (MoDeVVa@MoDELS, 2011)

RevKit: An Open Source Toolkit for the Design of Reversible Circuits. - Mathias Soeken; Stefan Frehse; Robert Wille; Rolf Drechsler (RC, 2011)

Encoding OCL Data Types for SAT-Based Verification of UML/OCL Models. - Mathias Soeken; Robert Wille; Rolf Drechsler (TAP@TOOLS, 2011)

Synthesis of reversible circuits with minimal lines for large functions. - Mathias Soeken; Robert Wille; Christoph Hilken; Nils Przigoda; Rolf Drechsler (ASP-DAC, 2012)

Eliminating invariants in UML/OCL models. - Mathias Soeken; Robert Wille; Rolf Drechsler (DATE, 2012)

Debugging of inconsistent UML/OCL models. - Robert Wille; Mathias Soeken; Rolf Drechsler (DATE, 2012)

Formal Specification Level: Towards verification-driven design based on natural language processing. - Rolf Drechsler; Mathias Soeken; Robert Wille (FDL, 2012)

Formal Specification Level. - Rolf Drechsler; Mathias Soeken; Robert Wille (FDL (Selected Papers), 2012)

Completeness-Driven Development. - Rolf Drechsler; Melanie Diepenbeck; Daniel Große; Ulrich Kühne; Hoang Minh Le 001; Julia Seiter 002; Mathias Soeken; Robert Wille (ICGT, 2012)

Behavior Driven Development for circuit design and verification. - Melanie Diepenbeck; Mathias Soeken; Daniel Große; Rolf Drechsler (HLDVT, 2012)

Optimizing the Mapping of Reversible Circuits to Four-Valued Quantum Gate Circuits. - Mathias Soeken; Zahra Sasanian; Robert Wille; D. Michael Miller; Rolf Drechsler (ISMVL, 2012)

A Synthesis Flow for Sequential Reversible Circuits. - Mathias Soeken; Robert Wille; Christian Otterstedt; Rolf Drechsler (ISMVL, 2012)

Exact Synthesis of Toffoli Gate Circuits with Negative Control Lines. - Robert Wille; Mathias Soeken; Nils Przigoda; Rolf Drechsler (ISMVL, 2012)

Circuit Line Minimization in the HDL-Based Synthesis of Reversible Logic. - Robert Wille; Mathias Soeken; Eleonora Schönborn; Rolf Drechsler (ISVLSI, 2012)

Property Checking of Quantum Circuits Using Quantum Multiple-Valued Decision Diagrams. - Julia Seiter 002; Mathias Soeken; Robert Wille; Rolf Drechsler (RC, 2012)

Using πDDs in the Design of Reversible Circuits. - Mathias Soeken; Robert Wille; Shin-ichi Minato; Rolf Drechsler (RC, 2012)

Assisted Behavior Driven Development Using Natural Language Processing. - Mathias Soeken; Robert Wille; Rolf Drechsler (TOOLS (50), 2012)

RevKit: A Toolkit for Reversible Circuit Design. - Mathias Soeken; Stefan Frehse; Robert Wille; Rolf Drechsler (J. Multiple Valued Log. Soft Comput., 2012)

Improving the mapping of reversible circuits to quantum circuits using multiple target lines. - Robert Wille; Mathias Soeken; Christian Otterstedt; Rolf Drechsler (ASP-DAC, 2013)

Determining relevant model elements for the verification of UML/OCL specifications. - Julia Seiter 002; Robert Wille; Mathias Soeken; Rolf Drechsler (DATE, 2013)

Towards a generic verification methodology for system models. - Robert Wille; Martin Gogolla; Mathias Soeken; Mirco Kuhlmann; Rolf Drechsler (DATE, 2013)

Hardware-Software Co-Visualization: Developing systems in the holodeck. - Rolf Drechsler; Mathias Soeken (DDECS, 2013)

Text statt C++: Automatisierung des Systementwurfs mit Hilfe natürlicher Sprachverarbeitung. - Rolf Drechsler; Mathias Soeken; Robert Wille (GI-Jahrestagung, 2013)

Formale Spezifikationsebene. - Mathias Soeken (Ausgezeichnete Informatikdissertationen, 2013)

Towards automatic scenario generation from coverage information. - Melanie Diepenbeck; Mathias Soeken; Daniel Große; Rolf Drechsler (AST, 2013)

Grammar-based program generation based on model finding. - Mathias Soeken; Rolf Drechsler (IDT, 2013)

Exact Template Matching Using Boolean Satisfiability. - Nabila Abdessaied; Mathias Soeken; Robert Wille; Rolf Drechsler (ISMVL, 2013)

Debugging of Reversible Circuits Using pDDs. - Laura Tague; Mathias Soeken; Shin-ichi Minato; Rolf Drechsler (ISMVL, 2013)

Generierung von OCL-Ausdrücken aus natürlichsprachlichen Beschreibungen. - Mathias Soeken; Robert Wille; Eugen Kuksa; Rolf Drechsler (MBMV, 2013)

Reducing the Depth of Quantum Circuits Using Additional Circuit Lines. - Nabila Abdessaied; Robert Wille; Mathias Soeken; Rolf Drechsler (RC, 2013)

White Dots do Matter: Rewriting Reversible Logic Circuits. - Mathias Soeken; Michael Kirkedal Thomsen (RC, 2013)

On quantum circuits employing roots of the Pauli matrices. - Mathias Soeken; D. Michael Miller; Rolf Drechsler (CoRR, 2013)

Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits. - Robert Wille; Mathias Soeken; Nils Przigoda; Rolf Drechsler (J. Multiple Valued Log. Soft Comput., 2013)

Formal specification level: concepts, methods, and algorithms. - Mathias Soeken (2013)

MetaSMT: a unified interface to SMT-LIB2. - Heinz Riener; Mathias Soeken; Clemens Werther; Görschwin Fey; Rolf Drechsler (FDL, 2014)

Automating the translation of assertions using natural language processing techniques. - Mathias Soeken; Christopher B. Harris; Nabila Abdessaied; Ian G. Harris; Rolf Drechsler (FDL, 2014)

Automated and quality-driven requirements engineering. - Rolf Drechsler; Mathias Soeken; Robert Wille (ICCAD, 2014)

Requirements Engineering for Cyber-Physical Systems - Challenges in the Context of "Industrie 4.0". - Stefan A. Wiesner; Christian Gorldt; Mathias Soeken; Klaus-Dieter Thoben; Rolf Drechsler (APMS (1), 2014)

Formale Methoden für Alle. - Mathias Soeken; Max Nitze; Rolf Drechsler (MBMV, 2014)

Quantum Circuit Optimization by Hadamard Gate Reduction. - Nabila Abdessaied; Mathias Soeken; Rolf Drechsler (RC, 2014)

Mapping NCV Circuits to Optimized Clifford+T Circuits. - D. Michael Miller; Mathias Soeken; Rolf Drechsler (RC, 2014)

Self-Verification as the Key Technology for Next Generation Electronic Systems. - Rolf Drechsler; Hoang Minh Le 001; Mathias Soeken (SBCCI, 2014)

iTac: Aspect Based Sentiment Analysis using Sentiment Trees and Dictionaries. - Fritjof Bornebusch; Glaucia Cancino; Melanie Diepenbeck; Rolf Drechsler; Smith Djomkam; Alvine Nzeungang Fanseu; Maryam Jalali; Marc Michael; Jamal Mohsen; Max Nitze; Christina Plump; Mathias Soeken; et al. (SemEval@COLING, 2014)

Behaviour Driven Development for Tests and Verification. - Melanie Diepenbeck; Ulrich Kühne; Mathias Soeken; Rolf Drechsler (TAP@STAF, 2014)

A framework for reversible circuit complexity. - Mathias Soeken; Nabila Abdessaied; Rolf Drechsler (CoRR, 2014)

Trading off circuit lines and gate costs in the synthesis of reversible logic. - Robert Wille; Mathias Soeken; D. Michael Miller; Rolf Drechsler (Integr., 2014)

Upper bounds for reversible circuits based on Young subgroups. - Nabila Abdessaied; Mathias Soeken; Michael Kirkedal Thomsen; Rolf Drechsler (Inf. Process. Lett., 2014)

Formal Specification Level - Concepts, Methods, and Algorithms. - Mathias Soeken; Rolf Drechsler (Springer, 2015)

Requirement Phrasing Assistance Using Automatic Quality Assessment. - Arman Allahyari-Abhari; Mathias Soeken; Rolf Drechsler (DDECS, 2015)

Simulation Graphs for Reverse Engineering. - Mathias Soeken; Baruch Sterin; Rolf Drechsler; Robert K. Brayton (FMCAD, 2015)

Multi-Objective BDD Optimization with Evolutionary Algorithms. - Saeideh Shirinzadeh; Mathias Soeken; Rolf Drechsler (GECCO, 2015)

Dynamic Template Matching with Mixed-Polarity Toffoli Gates. - Md. Mazder Rahman; Mathias Soeken; Gerhard W. Dueck (ISMVL, 2015)

Fredkin-Enabled Transformation-Based Reversible Logic Synthesis. - Mathias Soeken; Anupam Chattopadhyay (ISMVL, 2015)

Towards an Automatic Approach for Restricting UML/OCL Invariability Clauses. - Nils Przigoda; Judith Peters; Mathias Soeken; Robert Wille; Rolf Drechsler (MoDeVVa@MoDELS, 2015)

Technology Mapping for Single Target Gate Based Circuits Using Boolean Functional Decomposition. - Nabila Abdessaied; Mathias Soeken; Rolf Drechsler (RC, 2015)

Ricercar: A Language for Describing and Rewriting Reversible Circuits with Ancillae and Its Permutation Semantics. - Michael Kirkedal Thomsen; Robin Kaarsgaard; Mathias Soeken (RC, 2015)

Coverage of OCL Operation Specifications and Invariants. - Mathias Soeken; Julia Seiter 002; Rolf Drechsler (TAP@STAF, 2015)

Reversible circuit rewriting with simulated annealing. - Nabila Abdessaied; Mathias Soeken; Gerhard W. Dueck; Rolf Drechsler (VLSI-SoC, 2015)

Self-Inverse Functions and Palindromic Circuits. - Mathias Soeken; Michael Kirkedal Thomsen; Gerhard W. Dueck; D. Michael Miller (CoRR, 2015)

Specification-driven model transformation testing. - Esther Guerra; Mathias Soeken (Softw. Syst. Model., 2015)

BDD minimization for approximate computing. - Mathias Soeken; Daniel Große; Arun Chandrasekharan; Rolf Drechsler (ASP-DAC, 2016)

Precise error determination of approximated components in sequential circuits with model checking. - Arun Chandrasekharan; Mathias Soeken; Daniel Große; Rolf Drechsler (DAC, 2016)

Unlocking efficiency and scalability of reversible logic synthesis using conventional logic synthesis. - Mathias Soeken; Anupam Chattopadhyay (DAC, 2016)

An MIG-based compiler for programmable logic-in-memory architectures. - Mathias Soeken; Saeideh Shirinzadeh; Pierre-Emmanuel Gaillardon; Luca Gaetano Amarù; Rolf Drechsler; Giovanni De Micheli (DAC, 2016)

Formal verification of integer multipliers by combining Gröbner basis with logic reduction. - Amr A. R. Sayed-Ahmed; Daniel Große; Ulrich Kühne; Mathias Soeken; Rolf Drechsler (DATE, 2016)

Fast logic synthesis for RRAM-based in-memory computing using Majority-Inverter Graphs. - Saeideh Shirinzadeh; Mathias Soeken; Pierre-Emmanuel Gaillardon; Rolf Drechsler (DATE, 2016)

Optimizing Majority-Inverter Graphs with functional hashing. - Mathias Soeken; Luca Gaetano Amarù; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (DATE, 2016)

Multi-objective BDD optimization for RRAM based circuit design. - Saeideh Shirinzadeh; Mathias Soeken; Rolf Drechsler (DDECS, 2016)

Equivalence checking using Gröbner bases. - Amr A. R. Sayed-Ahmed; Daniel Große; Mathias Soeken; Rolf Drechsler (FMCAD, 2016)

Fast hierarchical NPN classification. - Ana Petkovska; Mathias Soeken; Giovanni De Micheli; Paolo Ienne; Alan Mishchenko (FPL, 2016)

Approximate BDD Optimization with Prioritized ε-Preferred Evolutionary Algorithm. - Saeideh Shirinzadeh; Mathias Soeken; Daniel Große; Rolf Drechsler (GECCO (Companion), 2016)

SAT-Based Combinational and Sequential Dependency Computation. - Mathias Soeken; Pascal Raiola; Baruch Sterin; Bernd Becker 001; Giovanni De Micheli; Matthias Sauer 002 (Haifa Verification Conference, 2016)

Approximation-aware rewriting of AIGs for error tolerant applications. - Arun Chandrasekharan; Mathias Soeken; Daniel Große; Rolf Drechsler (ICCAD, 2016)

Fast generation of lexicographic satisfiable assignments: enabling canonicity in SAT-based applications. - Ana Petkovska; Alan Mishchenko; Mathias Soeken; Giovanni De Micheli; Robert K. Brayton; Paolo Ienne (ICCAD, 2016)

Multilevel design understanding: from specification to logic (invited paper). - Sandip Ray; Ian G. Harris; Görschwin Fey; Mathias Soeken (ICCAD, 2016)

An extension of transformation-based reversible and quantum circuit synthesis. - Mathias Soeken; Gerhard W. Dueck; Md. Mazder Rahman; D. Michael Miller (ISCAS, 2016)

Technology Mapping of Reversible Circuits to Clifford+T Quantum Circuits. - Nabila Abdessaied; Matthew Amy; Mathias Soeken; Rolf Drechsler (ISMVL, 2016)

Notes on Majority Boolean Algebra. - Anupam Chattopadhyay; Luca Gaetano Amarù; Mathias Soeken; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (ISMVL, 2016)

Dynamic NoC buffer allocation for MPSoC timing side channel attack protection. - Johanna Sepúlveda; Daniel Florez; Mathias Soeken; Jean-Philippe Diguet; Guy Gogniat (LASCAS, 2016)

Symbolic Error Metric Determination for Approximate Computing. - Arun Chandrasekharan; Daniel Große; Mathias Soeken; Rolf Drechsler (MBMV, 2016)

Inversion optimization in Majority-Inverter Graphs. - Eleonora Testa; Mathias Soeken; Odysseas Zografos; Luca Gaetano Amarù; Praveen Raghavan; Rudy Lauwereins; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (NANOARCH, 2016)

Enumeration of Reversible Functions and Its Application to Circuit Complexity. - Mathias Soeken; Nabila Abdessaied; Giovanni De Micheli (RC, 2016)

A Fast Symbolic Transformation Based Algorithm for Reversible Logic Synthesis. - Mathias Soeken; Gerhard W. Dueck; D. Michael Miller (RC, 2016)

Heuristic NPN Classification for Large Functions Using AIGs and LEXSAT. - Mathias Soeken; Alan Mishchenko; Ana Petkovska; Baruch Sterin; Paolo Ienne; Robert K. Brayton; Giovanni De Micheli (SAT, 2016)

Verifying the structure and behavior in UML/OCL models using satisfiability solvers. - Nils Przigoda; Mathias Soeken; Robert Wille; Rolf Drechsler (IET Cyper-Phys. Syst.: Theory & Appl., 2016)

SyReC: A hardware description language for the specification and synthesis of reversible circuits. - Robert Wille; Eleonora Schönborn; Mathias Soeken; Rolf Drechsler (Integr., 2016)

Embedding of Large Boolean Functions for Reversible Logic. - Mathias Soeken; Robert Wille; Oliver Keszöcze; D. Michael Miller; Rolf Drechsler (ACM J. Emerg. Technol. Comput. Syst., 2016)

Ancilla-free synthesis of large reversible functions using binary decision diagrams. - Mathias Soeken; Laura Tague; Gerhard W. Dueck; Rolf Drechsler (J. Symb. Comput., 2016)

Complexity of reversible circuits and their quantum implementations. - Nabila Abdessaied; Matthew Amy; Rolf Drechsler; Mathias Soeken (Theor. Comput. Sci., 2016)

Multi-level logic benchmarks: An exactness study. - Luca Gaetano Amarù; Mathias Soeken; Winston Haaswijk; Eleonora Testa; Patrick Vuillod; Jiong Luo; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (ASP-DAC, 2017)

A novel basis for logic rewriting. - Winston Haaswijk; Mathias Soeken; Luca Gaetano Amarù; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (ASP-DAC, 2017)

Hierarchical Reversible Logic Synthesis Using LUTs. - Mathias Soeken; Martin Roetteler; Nathan Wiebe; Giovanni De Micheli (DAC, 2017)

Endurance management for resistive Logic-In-Memory computing architectures. - Saeideh Shirinzadeh; Mathias Soeken; Pierre-Emmanuel Gaillardon; Giovanni De Micheli; Rolf Drechsler (DATE, 2017)

Busy man's synthesis: Combinational delay optimization with SAT. - Mathias Soeken; Giovanni De Micheli; Alan Mishchenko (DATE, 2017)

Design automation and design space exploration for quantum computers. - Mathias Soeken; Martin Roetteler; Nathan Wiebe; Giovanni De Micheli (DATE, 2017)

Wave pipelining for majority-based beyond-CMOS technologies. - Odysseas Zografos; A. De Meester; Eleonora Testa; Mathias Soeken; Pierre-Emmanuel Gaillardon; Giovanni De Micheli; Luca Gaetano Amarù; Praveen Raghavan; Francky Catthoor; Rudy Lauwereins (DATE, 2017)

An adaptive prioritized ε-preferred evolutionary algorithm for approximate BDD optimization. - Saeideh Shirinzadeh; Mathias Soeken; Daniel Große; Rolf Drechsler (GECCO, 2017)

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains. - Zhufei Chu; Xifan Tang; Mathias Soeken; Ana Petkovska; Grace Zgheib; Luca Gaetano Amarù; Yinshui Xia; Paolo Ienne; Giovanni De Micheli; Pierre-Emmanuel Gaillardon (ACM Great Lakes Symposium on VLSI, 2017)

Enabling exact delay synthesis. - Luca Gaetano Amarù; Mathias Soeken; Patrick Vuillod; Jiong Luo; Alan Mishchenko; Pierre-Emmanuel Gaillardon; Janet Olson; Robert K. Brayton; Giovanni De Micheli (ICCAD, 2017)

RM3 based logic synthesis (Special session paper). - Mathias Soeken; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (ISCAS, 2017)

Classifying Functions with Exact Synthesis. - Winston Haaswijk; Eleonora Testa; Mathias Soeken; Giovanni De Micheli (ISMVL, 2017)

Inverter Propagation and Fan-Out Constraints for Beyond-CMOS Majority-Based Technologies. - Eleonora Testa; Odysseas Zografos; Mathias Soeken; Adrien Vaysset; Mauricio Manfrini; Rudy Lauwereins; Giovanni De Micheli (ISVLSI, 2017)

A PLiM Computer for the Internet of Things. - Mathias Soeken; Pierre-Emmanuel Gaillardon; Saeideh Shirinzadeh; Rolf Drechsler; Giovanni De Micheli (Computer, 2017)

Logic Synthesis for Quantum Computing. - Mathias Soeken; Martin Roetteler; Nathan Wiebe; Giovanni De Micheli (CoRR, 2017)

metaSMT: focus on your application and not on solver integration. - Heinz Riener; Finn Haedicke; Stefan Frehse; Mathias Soeken; Daniel Große; Rolf Drechsler; Görschwin Fey (Int. J. Softw. Tools Technol. Transf., 2017)

Exact Synthesis of Majority-Inverter Graphs and Its Applications. - Mathias Soeken; Luca Gaetano Amarù; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Functional decomposition using majority. - Zhufei Chu; Mathias Soeken; Yinshui Xia; Giovanni De Micheli (ASP-DAC, 2018)

A best-fit mapping algorithm to facilitate ESOP-decomposition in Clifford+T quantum network synthesis. - Giulia Meuli; Mathias Soeken; Martin Roetteler; Nathan Wiebe; Giovanni De Micheli (ASP-DAC, 2018)

SAT based exact synthesis using DAG topology families. - Winston Haaswijk; Alan Mishchenko; Mathias Soeken; Giovanni De Micheli (DAC, 2018)

Canonical computation without canonical representation. - Alan Mishchenko; Robert K. Brayton; Ana Petkovska; Mathias Soeken; Luca G. Amarù; Antun Domic (DAC, 2018)

Improvements to boolean resynthesis. - Luca Gaetano Amarù; Mathias Soeken; Patrick Vuillod; Jiong Luo; Alan Mishchenko; Janet Olson; Robert K. Brayton; Giovanni De Micheli (DATE, 2018)

Programming quantum computers using design automation. - Mathias Soeken; Thomas Häner; Martin Roetteler (DATE, 2018)

Practical exact synthesis. - Mathias Soeken; Winston Haaswijk; Eleonora Testa; Alan Mishchenko; Luca Gaetano Amarù; Robert K. Brayton; Giovanni De Micheli (DATE, 2018)

Majority logic synthesis. - Luca G. Amarù; Eleonora Testa; Miguel Couceiro; Odysseas Zografos; Giovanni De Micheli; Mathias Soeken (ICCAD, 2018)

Integrated ESOP Refactoring for Industrial Designs. - Winston Haaswijk; Luca Gaetano Amarù; Patrick Vuillod; Jiong Luo; Mathias Soeken; Giovanni De Micheli (ICECS, 2018)

Deep Learning for Logic Optimization Algorithms. - Winston Haaswijk; Edo Collins; Benoit Seguin; Mathias Soeken; Frédéric Kaplan; Sabine Süsstrunk; Giovanni De Micheli (ISCAS, 2018)

Translating Between the Roots of the Identity in Quantum Computers. - Wouter Castryck; Jeroen Demeyer; Alexis De Vos; Oliver Keszöcze; Mathias Soeken (ISMVL, 2018)

A Spectral Algorithm for Ternary Function Classification. - D. Michael Miller; Mathias Soeken (ISMVL, 2018)

Size Optimization of MIGs with an Application to QCA and STMG Technologies. - Heinz Riener; Eleonora Testa; Luca G. Amarù; Mathias Soeken; Giovanni De Micheli (NANOARCH, 2018)

Quantum Circuits for Floating-Point Arithmetic. - Thomas Häner; Mathias Soeken; Martin Roetteler; Krysta M. Svore (RC, 2018)

SAT-based {CNOT, T} Quantum Circuit Synthesis. - Giulia Meuli; Mathias Soeken; Giovanni De Micheli (RC, 2018)

The EPFL Logic Synthesis Libraries. - Mathias Soeken; Heinz Riener; Winston Haaswijk; Giovanni De Micheli (CoRR, 2018)

The complexity of error metrics. - Oliver Keszöcze; Mathias Soeken; Rolf Drechsler (Inf. Process. Lett., 2018)

Pairs of majority-decomposing functions. - Mathias Soeken; Eleonora Testa; Alan Mishchenko; Giovanni De Micheli (Inf. Process. Lett., 2018)

Behaviour Driven Development for Hardware Design. - Melanie Diepenbeck; Ulrich Kühne; Mathias Soeken; Daniel Große; Rolf Drechsler (IPSJ Trans. Syst. LSI Des. Methodol., 2018)

Logic Synthesis for RRAM-Based In-Memory Computing. - Saeideh Shirinzadeh; Mathias Soeken; Pierre-Emmanuel Gaillardon; Rolf Drechsler (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Structural rewriting in XOR-majority graphs. - Zhufei Chu; Mathias Soeken; Yinshui Xia; Lun-Yao Wang; Giovanni De Micheli (ASP-DAC, 2019)

Scalable Generic Logic Synthesis: One Approach to Rule Them All. - Heinz Riener; Eleonora Testa; Winston Haaswijk; Alan Mishchenko; Luca G. Amarù; Giovanni De Micheli; Mathias Soeken (DAC, 2019)

Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications. - Eleonora Testa; Mathias Soeken; Luca G. Amarù; Giovanni De Micheli (DAC, 2019)

Reversible Pebbling Game for Quantum Memory Management. - Giulia Meuli; Mathias Soeken; Martin Roetteler; Nikolaj S. Bjørner; Giovanni De Micheli (DATE, 2019)

On-the-fly and DAG-aware: Rewriting Boolean Networks with Exact Synthesis. - Heinz Riener; Winston Haaswijk; Alan Mishchenko; Giovanni De Micheli; Mathias Soeken (DATE, 2019)

Compiling Permutations for Superconducting QPUs. - Mathias Soeken; Fereshte Mozafari; Bruno Schmitt; Giovanni De Micheli (DATE, 2019)

Scalable Boolean Methods in a Modern Synthesis Flow. - Eleonora Testa; Luca G. Amarù; Mathias Soeken; Alan Mishchenko; Patrick Vuillod; Jiong Luo; Christopher Casares; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (DATE, 2019)

The Role of Multiplicative Complexity in Compiling Low $T$-count Oracle Circuits. - Giulia Meuli; Mathias Soeken; Earl T. Campbell; Martin Roetteler; Giovanni De Micheli (ICCAD, 2019)

Exact Synthesis of Boolean Functions in Majority-of-Five Forms. - Zhufei Chu; Winston Haaswijk; Mathias Soeken; Yinshui Xia; Lun-Yao Wang; Giovanni De Micheli (ISCAS, 2019)

Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis. - Debjyoti Bhattacharjee; Mathias Soeken; Srijit Dutta; Anupam Chattopadhyay; Giovanni De Micheli (ISMVL, 2019)

Scaling-up ESOP Synthesis for Quantum Compilation. - Bruno Schmitt; Mathias Soeken; Giovanni De Micheli; Alan Mishchenko (ISMVL, 2019)

Logic Optimization of Majority-Inverter Graphs. - Heinz Riener; Eleonora Testa; Winston Haaswijk; Alan Mishchenko; Luca G. Amarù; Giovanni De Micheli; Mathias Soeken (MBMV, 2019)

A Hybrid Method for Spectral Translation Equivalent Boolean Functions. - Mathias Soeken; Eleonora Testa; D. Michael Miller (PACRIM, 2019)

Using ZDDs in the mapping of quantum circuits. - Mathias Soeken (QPL, 2019)

ROS: Resource-constrained Oracle Synthesis for Quantum Computers. - Giulia Meuli; Mathias Soeken; Martin Roetteler; Giovanni De Micheli (QPL, 2019)

Logic Synthesis for Established and Emerging Computing. - Eleonora Testa; Mathias Soeken; Luca Gaetano Amarù; Giovanni De Micheli (Proc. IEEE, 2019)

Mapping Monotone Boolean Functions into Majority. - Eleonora Testa; Mathias Soeken; Luca Gaetano Amarù; Winston Haaswijk; Giovanni De Micheli (IEEE Trans. Computers, 2019)

LUT-Based Hierarchical Reversible Logic Synthesis. - Mathias Soeken; Martin Roetteler; Nathan Wiebe; Giovanni De Micheli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Exact DAG-Aware Rewriting. - Heinz Riener; Alan Mishchenko; Mathias Soeken (DATE, 2020)

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic : (Special Session Paper). - Eleonora Testa; Samantha Lubaba Noor; Odysseas Zografos; Mathias Soeken; Francky Catthoor; Azad Naeemi; Giovanni De Micheli (DATE, 2020)

Enumerating Optimal Quantum Circuits using Spectral Classification. - Giulia Meuli; Mathias Soeken; Martin Roetteler; Giovanni De Micheli (ISCAS, 2020)

Automatic Uniform Quantum State Preparation Using Decision Diagrams. - Fereshte Mozafari; Mathias Soeken; Heinz Riener; Giovanni De Micheli (ISMVL, 2020)

Symbolic Algorithms for Token Swapping. - Bruno Schmitt; Mathias Soeken; Giovanni De Micheli (ISMVL, 2020)

Quantum Circuits for Functionally Controlled NOT Gates. - Mathias Soeken; Martin Roetteler (QCE, 2020)

Extending Boolean Methods for Scalable Logic Synthesis. - Eleonora Testa; Luca G. Amarù; Mathias Soeken; Alan Mishchenko; Patrick Vuillod; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (IEEE Access, 2020)

Automatic accuracy management of quantum programs via (near-)symbolic resource estimation. - Giulia Meuli; Mathias Soeken; Martin Roetteler; Thomas Häner (CoRR, 2020)

Lowering the T-depth of Quantum Circuits By Reducing the Multiplicative Depth Of Logic Networks. - Thomas Häner; Mathias Soeken (CoRR, 2020)

Improved Quantum Circuits for Elliptic Curve Discrete Logarithms. - Thomas Häner; Samuel Jaques; Michael Naehrig; Martin Roetteler; Mathias Soeken (IACR Cryptol. ePrint Arch., 2020)

Determining the Multiplicative Complexity of Boolean Functions using SAT. - Mathias Soeken (IACR Cryptol. ePrint Arch., 2020)

A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks. - Eleonora Testa; Mathias Soeken; Heinz Riener; Luca G. Amarù; Giovanni De Micheli (IACR Cryptol. ePrint Arch., 2020)

A Spectral Algorithm for 3-valued Function Equivalence Classification. - D. Michael Miller; Mathias Soeken (J. Multiple Valued Log. Soft Comput., 2020)

Enabling accuracy-aware Quantum compilers using symbolic resource estimation. - Giulia Meuli; Mathias Soeken; Martin Roetteler; Thomas Häner (Proc. ACM Program. Lang., 2020)

Advanced Functional Decomposition Using Majority and Its Applications. - Zhufei Chu; Mathias Soeken; Yinshui Xia; Lun-Yao Wang; Giovanni De Micheli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

SAT-Based Exact Synthesis: Encodings, Topology Families, and Parallelism. - Winston Haaswijk; Mathias Soeken; Alan Mishchenko; Giovanni De Micheli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

A Resource Estimation and Verification Workflow in Q# Special session paper. - Mathias Soeken; Mariia Mykhailova; Vadym Kliuchnikov; Christopher E. Granade; Alexander Vaschillo (DATE, 2021)

Testing Quantum Programs using Q# and Microsoft Quantum Development Kit. - Mariia Mykhailova; Mathias Soeken (Q-SET@QCE, 2021)

Three-Input Gates for Logic Synthesis. - Dewmini Sudara Marakkalage; Eleonora Testa; Heinz Riener; Alan Mishchenko; Mathias Soeken; Giovanni De Micheli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Automatic oracle generation in microsoft's quantum development kit using QIR and LLVM passes. - Mathias Soeken; Mariia Mykhailova (DAC, 2022)

QParallel: Explicit Parallelism for Programming Quantum Computers. - Thomas Häner; Vadym Kliuchnikov; Martin Roetteler; Mathias Soeken; Alexander Vaschillo (CoRR, 2022)

A Q# Implementation of a Quantum Lookup Table for Quantum Arithmetic Functions. - Rajiv Krishnakumar; Mathias Soeken; Martin Roetteler; William J. Zeng (CoRR, 2022)

Space-time optimized table lookup. - Thomas Häner; Vadym Kliuchnikov; Martin Roetteler; Mathias Soeken (CoRR, 2022)

Assessing requirements to scale to practical quantum advantage. - Michael E. Beverland; Prakash Murali; Matthias Troyer; Krysta M. Svore; Torsten Hoefler; Vadym Kliuchnikov; Guang Hao Low; Mathias Soeken; Aarthi Sundaram; Alexander Vaschillo (CoRR, 2022)

Design and Automation for Quantum Computation and Quantum Technologies. - Jie-Hong R. Jiang; Giovanni De Micheli; Kaitlin N. Smith; Mathias Soeken (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

Advances in Quantum Computation and Quantum Technologies: A Design Automation Perspective. - Giovanni De Micheli; Jie-Hong R. Jiang; Robert Rand 001; Kaitlin N. Smith; Mathias Soeken (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

The multiplicative complexity of interval checking. - Thomas Häner; Mathias Soeken (IACR Cryptol. ePrint Arch., 2022)

Using Azure Quantum Resource Estimator for Assessing Performance of Fault Tolerant Quantum Computation. - Wim van Dam; Mariia Mykhailova; Mathias Soeken (SC Workshops, 2023)

Utilizing Resource Estimation for the Development of Quantum Computing Applications. - Nils Quetschlich; Mathias Soeken; Prakash Murali; Robert Wille (QCE, 2024)

Back-end-aware Fault-tolerant Quantum Oracle Synthesis. - Mingfei Yu; Alessandro Tempia Calvino; Mathias Soeken; Giovanni De Micheli (ASP-DAC, 2025)

Quantum system architecture for utility scale: Keynote. - Mathias Soeken (CF, 2025)