Exploiting Bus Communication to Improve Cache Attacks on Systems-on-Chips. - Johanna Sepúlveda; Mathieu Gross; Andreas Zankl; Georg Sigl (ISVLSI, 2017)

Towards trace-driven cache attacks on Systems-on-Chips - exploiting bus communication. - Johanna Sepúlveda; Mathieu Gross; Andreas Zankl; Georg Sigl (ReCoSoC, 2017)

Where Technology Meets Security: Key Storage and Data Separation for System-on-Chips. - Georg Sigl; Mathieu Gross; Michael Pehl (ESSCIRC, 2018)

Breaking TrustZone Memory Isolation through Malicious Hardware on a Modern FPGA-SoC. - Mathieu Gross; Nisha Jacob; Andreas Zankl; Georg Sigl (ASHES@CCS, 2019)

Beyond Cache Attacks: Exploiting the Bus-based Communication Structure for Powerful On-Chip Microarchitectural Attacks. - Johanna Sepúlveda; Mathieu Gross; Andreas Zankl; Georg Sigl (ACM Trans. Embed. Comput. Syst., 2021)

Breaking TrustZone memory isolation and secure boot through malicious hardware on a modern FPGA-SoC. - Mathieu Gross; Nisha Jacob; Andreas Zankl; Georg Sigl (J. Cryptogr. Eng., 2022)

Enhancing the Security of FPGA-SoCs via the Usage of ARM TrustZone and a Hybrid-TPM. - Mathieu Gross; Konrad Hohentanner; Stefan Wiehler; Georg Sigl (ACM Trans. Reconfigurable Technol. Syst., 2022)

FPGANeedle: Precise Remote Fault Attacks from FPGA to CPU. - Mathieu Gross; Jonas Krautter; Dennis Gnad; Michael Gruber; Georg Sigl; Mehdi B. Tahoori (ASP-DAC, 2023)

CPU to FPGA Power Covert Channel in FPGA-SoCs. - Mathieu Gross; Robert Kunzelmann; Georg Sigl (IACR Cryptol. ePrint Arch., 2023)

Remote Security Threats and Protection of Modern FPGA-SoC Architectures / Mathieu Etienne André Gross ; Gutachter: Georg Sigl, Walter Stechele ; Betreuer: Georg Sigl. - Mathieu Gross (2023)