A GSM speech coder implemented on a customized processor architecture. - Viktor Öwall; Pietro Andreani; L. Brange; Peter Nilsson 001; A. Wass; Mats Torkelson (ISCAS, 1993)

A Bit-Serial CMOS Digital IF-Filter for Mobile Radio Using an On-Chip Clock. - Peter Nilsson 001; Mats Torkelson; Kent Palmkvist; Mark Vesterbacka; Lars Wanhammar (Mobile Communications, 1994)

A systolic array implementation of common factor algorithm to compute DFT. - Shousheng He; Mats Torkelson (ISPAN, 1994)

A Pipelined Bit-Serial Complex Multiplier Using Distributed Arithmetic. - Shousheng He; Mats Torkelson (ISCAS, 1995)

VLSI computation of the partial DFT for (de)modulation in multi-channel OFDM system. - Shousheng He; Mats Torkelson (PIMRC, 1995)

Design of a fast and area efficient filter. - Pontus Åström; Peter Nilsson 001; Mats Torkelson (EUSIPCO, 1996)

A New Approach to Pipeline FFT Processor. - Shousheng He; Mats Torkelson (IPPS, 1996)

A monolithic digital clock-generator for on-chip clocking of custom DSP's. - Peter Nilsson 001; Mats Torkelson (IEEE J. Solid State Circuits, 1996)

Computing partial DFT for comb spectrum evaluation. - Shousheng He; Mats Torkelson (IEEE Signal Process. Lett., 1996)

A custom digital intermediate frequency filter for the American mobile telephone system. - Peter Nilsson 001; Mats Torkelson (IEEE J. Solid State Circuits, 1997)

Design and implementation of a 1024-point pipeline FFT processor. - Shousheng He; Mats Torkelson (CICC, 1998)

A complex multiplier with low logic depth. - Anders Berkeman; Viktor Öwall; Mats Torkelson (ICECS, 1998)

An Orthogonal Time-Frequency Extraction Approach to 2D Systolic Architecture for 1D DFT Computation. - Shousheng He; Mats Torkelson (J. VLSI Signal Process., 1999)

A Custom Image Convolution DSP with a Sustained Calculation Capacity of >1 GMAC/s and Low I/O Bandwidth. - Viktor Öwall; Mats Torkelson; Peter Egelberg (J. VLSI Signal Process., 1999)

A digitally controlled low-power clock multiplier for globally asynchronous locally synchronous designs. - Thomas Olsson 001; Peter Nilsson 001; Thomas Meincke; Ahmad Hemami; Mats Torkelson (ISCAS, 2000)

A low logic depth complex multiplier using distributed arithmetic. - Anders Berkeman; Viktor Öwall; Mats Torkelson (IEEE J. Solid State Circuits, 2000)