Are there economic benefits in DFM? - Matt Nowak; Riko Radojcic (DAC, 2005)

Holistic pathfinding: virtual wireless chip design for advanced technology and design exploration. - Matt Nowak; Jose Corleto; Christopher Chun; Riko Radojcic (DAC, 2008)

Pathfinding for 22nm CMOS designs using Predictive Technology Models. - Xia Li; Wei Zhao; Yu Cao 001; Zhi Zhu; Jooyoung Song; David Bang; Chi-Chao Wang; Seung-Hyuk Kang; Joseph Wang; Matt Nowak; Nick Yu (CICC, 2009)

Enabling power distribution network analysis flows for 3D ICs. - Xiang Hu; Thomas Toms; Riko Radojcic; Matt Nowak; Nick Yu; Chung-Kuan Cheng (3DIC, 2010)

Device-architecture co-optimization of STT-RAM based memory for low power embedded systems. - Cong Xu 002; Dimin Niu; Xiaochun Zhu; Seung-Hyuk Kang; Matt Nowak; Yuan Xie 001 (ICCAD, 2011)

Electrical Characterization for Intertier Connections and Timing Analysis for 3-D ICs. - Xiaoxia Wu; Wei Zhao; Mark Nakamoto; Chandra Nimmagadda; Durodami Lisk; Sam Gu; Riko Radojcic; Matt Nowak; Yuan Xie 001 (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Power and signal integrity challenges in 3D systems. - Miguel Corbalan; Anup Keval; Thomas Toms; Durodami Lisk; Riko Radojcic; Matt Nowak (DAC, 2013)