LLMs for Hardware Security: Boon or Bane? - Rahul Kande; Vasudev Gohil; Matthew DeLorenzo; Chen Chen 125; Jeyavijayan Rajendran (VTS, 2024)

Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTS. - Matthew DeLorenzo; Animesh Basak Chowdhury; Vasudev Gohil; Shailja Thakur; Ramesh Karri; Siddharth Garg; Jeyavijayan Rajendran (CoRR, 2024)

CreativEval: Evaluating Creativity of LLM-Based Hardware Code Generation. - Matthew DeLorenzo; Vasudev Gohil; Jeyavijayan Rajendran (CoRR, 2024)

LLMPirate: LLMs for Black-box Hardware IP Piracy. - Vasudev Gohil; Matthew DeLorenzo; Veera Vishwa Achuta Sai Venkat Nallam; Joey See; Jeyavijayan Rajendran (NDSS, 2025)

Free and Fair Hardware: A Pathway to Copyright Infringement-Free Verilog Generation using LLMs. - Sam Bush; Matthew DeLorenzo; Phat Tieu; Jeyavijayan Rajendran (CoRR, 2025)

Abstractions-of-Thought: Intermediate Representations for LLM Reasoning in Hardware Design. - Matthew DeLorenzo; Kevin Tieu; Prithwish Jana; Piyush Jha; Dileep Kalathil; Vijay Ganesh 001; Jeyavijayan Rajendran (CoRR, 2025)