A spiking neural network on a portable FPGA tablet. - Matthew Naylor 002; Paul James Fox; A. Theodore Markettos; Simon W. Moore (FPL, 2013)

Managing the FPGA memory wall: Custom computing or vector processing? - Matthew Naylor 002; Paul James Fox; A. Theodore Markettos; Simon W. Moore (FPL, 2013)

Rapid codesign of a soft vector processor and its compiler. - Matthew Naylor 002; Simon W. Moore (FPL, 2014)

A generic synthesisable test bench. - Matthew Naylor 002; Simon W. Moore (MEMOCODE, 2015)

A consistency checker for memory subsystem traces. - Matthew Naylor 002; Simon W. Moore; Alan Mujumdar (FMCAD, 2016)

Programming Model to Develop Supercomputer Combinatorial Solvers. - Ghaith Tarawneh; Andrey Mokhov; Matthew Naylor 002; Alex Rast; Simon W. Moore; David B. Thomas; Alex Yakovlev; Andrew D. Brown (ICPP Workshops, 2017)

Distributed Event-Based Computing. - Andrew D. Brown; David B. Thomas; Jeff Reeve; Ghaith Tarawneh; Alessandro de Gennaro; Andrey Mokhov; Matthew Naylor 002; Tom Kazmierski (PARCO, 2017)

Tinsel: A Manythread Overlay for FPGA Clusters. - Matthew Naylor 002; Simon W. Moore; David B. Thomas (FPL, 2019)

POETS: Distributed Event-Based Computing - Scaling Behaviour. - Andrew D. Brown; Mark Vousden; Alex Rast; Graeme M. Bragg; David B. Thomas; Jonny Beaumont; Matthew Naylor 002; Andrey Mokhov (PARCO, 2019)

Termination detection for fine-grained message-passing architectures. - Matthew Naylor 002; Simon W. Moore; Andrey Mokhov; David B. Thomas; Jonathan R. Beaumont; Shane T. Fleming; A. Theodore Markettos; Thomas Bytheway; Andrew D. Brown (ASAP, 2020)

Rigorous engineering for hardware security: Formal modelling and proof in the CHERI design and implementation process. - Kyndylan Nienhuis; Alexandre Joannou; Thomas Bauereiss; Anthony C. J. Fox; Michael Roe; Brian Campbell 001; Matthew Naylor 002; Robert M. Norton; Simon W. Moore; Peter G. Neumann; Ian Stark; Robert N. M. Watson; et al. (SP, 2020)

General hardware multicasting for fine-grained message-passing architectures. - Matthew Naylor 002; Simon W. Moore; David B. Thomas; Jonathan R. Beaumont; Shane T. Fleming; Mark Vousden; A. Theodore Markettos; Thomas Bytheway; Andrew D. Brown (PDP, 2021)

Synchronization in graph analysis algorithms on the Partially Ordered Event-Triggered Systems many-core architecture. - Ashur Rafiev; Alex Yakovlev; Ghaith Tarawneh; Matthew Naylor 002; Simon W. Moore; David B. Thomas; Graeme M. Bragg; Mark Vousden; Andrew D. Brown (IET Comput. Digit. Tech., 2022)

Practical Distributed Implementation of Very Large Scale Petri Net Simulations. - Ashur Rafiev; Jordan Morris; Fei Xia 001; Alex Yakovlev; Matthew Naylor 002; Simon W. Moore; David B. Thomas; Graeme M. Bragg; Mark Vousden; Andrew Brown (Trans. Petri Nets Other Model. Concurr., 2022)

POETS: An Event-driven Approach to Dissipative Particle Dynamics: Implementing a Massively Compute-intensive Problem on a Novel Hard/Software Architecture. - Andrew D. Brown; Jonathan R. Beaumont; David B. Thomas; Julian C. Shillcock; Matthew Naylor 002; Graeme M. Bragg; Mark Vousden; Simon W. Moore; Shane T. Fleming (ACM Trans. Parallel Comput., 2023)

Advanced Dynamic Scalarisation for RISC-V GPGPUs. - Matthew Naylor 002; Alexandre Joannou; A. Theodore Markettos; Paul Metzger; Simon W. Moore; Timothy M. Jones 001 (ICCD, 2024)

Randomized Testing of RISC-V CPUs Using Direct Instruction Injection. - Alexandre Joannou; Peter Rugg; Jonathan Woodruff; Franz A. Fuchs; Marno van der Maas; Matthew Naylor 002; Michael Roe; Robert N. M. Watson; Peter G. Neumann; Simon W. Moore (IEEE Des. Test, 2024)

Deprivileging Low-Level GPU Drivers Efficiently with User-Space Processes and CHERI Compartments. - Paul Metzger; A. Theodore Markettos; Edward Tomasz Napierala; Matthew Naylor 002; Robert N. M. Watson; Timothy M. Jones 001 (CCS, 2025)

Adaptive CHERI Compartmentalization for Heterogeneous Accelerators. - Jianyi Cheng; A. Theodore Markettos; Alexandre Joannou; Paul Metzger; Matthew Naylor 002; Peter Rugg; Timothy M. Jones 001 (ISCA, 2025)

CHERI-SIMT: Implementing Capability Memory Protection in GPUs. - Matthew Naylor 002; Alexandre Joannou; A. Theodore Markettos; Paul Metzger; Simon W. Moore; Timothy M. Jones 001 (ASPLOS (1), 2026)