A High-Performance Hardware Accelerator for HEVC Motion Compensation. - Matthias Göbel 001 (Informatiktage, 2014)

High Performance Memory Accesses on FPGA-SoCs: A Quantitative Analysis. - Matthias Göbel 001; Chi Ching Chi; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (FCCM, 2015)

A Quantitative Analysis of the Memory Architecture of FPGA-SoCs. - Matthias Göbel 001; Ahmed Elhossini; Chi Ching Chi; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (ARC, 2017)

A Methodology for Predicting Application-Specific Achievable Memory Bandwidth for HW/SW-Codesign. - Matthias Göbel 001; Ahmed Elhossini; Ben H. H. Juurlink (DSD, 2017)

An Application-Specific Memory Management Unit for FPGA-SoCs. - Matthias Goebel 001; Ilja Behnke; Ahmed Elhossini; Ben H. H. Juurlink (IPDPS Workshops, 2018)

Evaluating the Memory Architecture of Next-Generation FPGA-SoCs for HPC. - Matthias Goebel 001; Kai Norman Clasen; Robert Drehmel; Ben H. H. Juurlink (HPCS, 2019)