Matthias Sauer

Affiliations:
  • Apple, Inc., Cupertino, CA, USA
  • Technical University Munich, Institute for Network Theory and Circuit Design, Germany (former)


According to our database1, Matthias Sauer authored at least 13 papers between 1991 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2022
Transitioning to 6G: Part 2-Systems and Network Technology Areas.
IEEE Wirel. Commun., 2022

2007
A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions.
IEEE J. Solid State Circuits, 2007

2006
A 90nm CMOS low-power GSM/EDGE multimedia-enhanced baseband processor with 380MHz ARM9 and mixed-signal extensions.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

1995
Algorithmustransformationen beim Entwurf anwendungsspezifischer integrierter Schaltungen.
PhD thesis, 1995

Error Analysis of CORDIC-Based Jacobi Algorithms.
IEEE Trans. Computers, 1995

1994
A New Retiming Algorithm for Circuit Design.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Fault Location in Multistage Interconnection Networks with Global and Distributed Control.
Proceedings of the 8th International Symposium on Parallel Processing, 1994

1993
An Efficient Jacobi-like Algorithm for Parallel Eigenvalue Computation.
IEEE Trans. Computers, 1993

Block Sequential CORDIC Architectures.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

A CORDIC-based Jacobi-like algorithm for eigenvalue computation.
Proceedings of the IEEE International Conference on Acoustics, 1993

1992
A pipeline architecture for modified higher radix FFT.
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992

On partitioning of multistage algorithms and design of intermediate memories.
Proceedings of the Application Specific Array Processors, 1992

1991
Sorting on defective VLSI-arrays.
Integr., 1991


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