. Analog slice turbo decoding. - Matthieu Arzel; Cyril Lahuec; Fabrice Seguin; David Gnaedig; Michel Jézéquel (ISCAS (1), 2005)

Semi-iterative analog turbo decoding. - Matthieu Arzel; Fabrice Seguin; Cyril Lahuec; Michel Jézéquel (ISCAS, 2006)

Semi-Iterative Analog Turbo Decoding. - Matthieu Arzel; Cyril Lahuec; Fabrice Seguin; David Gnaedig; Michel Jézéquel (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Analog Decoder Performance Degradation Due to BJTs' Parasitic Elements. - Nicolas Duchaux; Cyril Lahuec; Matthieu Arzel; Fabrice Seguin (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Stochastic Decoding of Turbo Codes. - Quang Trung Dong; Matthieu Arzel; Christophe Jégo; Warren J. Gross (IEEE Trans. Signal Process., 2010)

A Self-Powered Telemetry System to Estimate the Postoperative Instability of a Knee Implant. - Cyril Lahuec; Shaban Almouahed; Matthieu Arzel; Deepak Gupta; Chafiaâ Hamitouche; Michel Jézéquel; Eric Stindel; Christian Roux (IEEE Trans. Biomed. Eng., 2011)

Stochastic Multiple Stream Decoding of Cortex Codes. - Matthieu Arzel; Cyril Lahuec; Christophe Jégo; Warren J. Gross; Yvain Bruned (IEEE Trans. Signal Process., 2011)

Multi-standard trellis-based FEC decoder. - Jean Dion; Marie-Hélène Hamon; Pierre Penard; Matthieu Arzel; Michel Jézéquel (DASIP, 2012)

Adapted scheduling of QC-LDPC decoding for multistandard receivers. - Jean Dion; Marie-Hélène Hamon; Pierre Penard; Matthieu Arzel; Michel Jézéquel (ISTC, 2012)

Hardware acceleration of SVM-based traffic classification on FPGA. - Tristan Groleat; Matthieu Arzel; Sandrine Vaton (IWCMC, 2012)

Stochastic chase decoder for reed-solomon codes. - Romain Heloir; Camille Leroux; Saied Hemati; Matthieu Arzel; Warren J. Gross (NEWCAS, 2012)

Flexible, extensible, open-source and affordable FPGA-based traffic generator. - Tristan Groleat; Matthieu Arzel; Sandrine Vaton; Alban Bourge; Yannick Le Balch; Hicham Bougdal; Manuel Aranaz Padron (HPPN@HPDC, 2013)

Analog implementation of encoded neural networks. - Benoit Larras; Cyril Lahuec; Matthieu Arzel; Fabrice Seguin (ISCAS, 2013)

Study of a cosmic ray impact on combinatorial logic circuits of an 8bit SAR ADC in 65nm CMOS technology. - Daniel Gomez Toro; Fabrice Seguin; Matthieu Arzel; Michel Jézéquel (MWSCAS, 2013)

Analog encoded neural network for power management in MPSoC. - Benoit Larras; Bartosz Boguslawski; Cyril Lahuec; Matthieu Arzel; Fabrice Seguin; Frédéric Heitzmann (NEWCAS, 2013)

PAPR reduction using contiguous-tone Tone Reservation technique in optical OFDM IMDD transmissions. - Tuan Anh Truong; Hao Lin; Bruno Jahan; Matthieu Arzel; Michel Jézéquel (OFC/NFOEC, 2013)

Low-complexity layered BP-based detection and decoding for a NB-LDPC coded MIMO system. - Ali Haroun; Charbel Abdel Nour; Matthieu Arzel; Christophe Jégo (ICC, 2014)

Low-complexity LDPC-coded iterative MIMO receiver based on belief propagation algorithm for detection. - Ali Haroun; Charbel Abdel Nour; Matthieu Arzel; Christophe Jégo (ISTC, 2014)

Symbol-based BP detection for MIMO systems associated with non-binary LDPC codes. - Ali Haroun; Charbel Abdel Nour; Matthieu Arzel; Christophe Jégo (WCNC, 2014)

High-speed flow-based classification on FPGA. - Tristan Groleat; Sandrine Vaton; Matthieu Arzel (Int. J. Netw. Manag., 2014)

Soft Error Detection and Correction Technique for Radiation Hardening Based on C-element and BICS. - Daniel Gomez Toro; Matthieu Arzel; Fabrice Seguin; Michel Jézéquel (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Design of analog subthreshold Encoded Neural Network circuit in sub-100nm CMOS. - Benoit Larras; Cyril Lahuec; Fabrice Seguin; Matthieu Arzel (IJCNN, 2015)

Ouessant: Flexible integration of dedicated coprocessors in Systems on Chip. - Pierre-Henri Horrein; Philip-Dylan Gleonec; Erwan Libessart; André Lalevee; Matthieu Arzel (DATE, 2016)

AutoReloc: Automated Design Flow for Bitstream Relocation on Xilinx FPGAs. - André Lalevee; Pierre-Henri Horrein; Matthieu Arzel; Michael Hübner 001; Sandrine Vaton (DSD, 2016)

Toward sub-pJ per classification in Body Area Sensor Networks. - Paul Chollet; Kevin Colombier; Cyril Lahuec; Matthieu Arzel; Fabrice Seguin (NEWCAS, 2016)

Low-Complexity Soft Detection of QAM Demapper for a MIMO System. - Ali Haroun; Charbel Abdel Nour; Matthieu Arzel; Christophe Jégo (IEEE Commun. Lett., 2016)

Ultra-Low-Energy Mixed-Signal IC Implementing Encoded Neural Networks. - Benoit Larras; Cyril Lahuec; Fabrice Seguin; Matthieu Arzel (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Combining FPGAs and processors for high-throughput forensics IEEE CNS 17 poster. - Franck Cornevaux-Juignet; Matthieu Arzel; Pierre-Henri Horrein; Tristan Groleat; Christian Person (CNS, 2017)

Open-source flexible packet parser for high data rate agile network probe. - Franck Cornevaux-Juignet; Matthieu Arzel; Pierre-Henri Horrein; Tristan Groleat; Christian Person (CNS, 2017)

A sub-nJ CMOS ECG classifier for wireless smart sensor. - Paul Chollet; Remi Pallas; Cyril Lahuec; Matthieu Arzel; Fabrice Seguin (EMBC, 2017)

Incremental learning on chip. - Ghouthi Boukli Hacene; Vincent Gripon; Nicolas Farrugia; Matthieu Arzel; Michel Jézéquel (GlobalSIP, 2017)

A 65-nm CMOS 7fJ per synaptic event clique-based neural network in scalable architecture. - Benoit Larras; Paul Chollet; Cyril Lahuec; Fabrice Seguin; Matthieu Arzel (ISCAS, 2017)

An ultra-low power iterative clique-based neural network integrated in 65-nm CMOS. - Paul Chollet; Benoit Larras; Cyril Lahuec; Fabrice Seguin; Matthieu Arzel (NEWCAS, 2017)

A scaling-less Newton-Raphson pipelined implementation for a fixed-point inverse square root operator. - Erwan Libessart; Matthieu Arzel; Cyril Lahuec; Francesco Paolo Andriulli (NEWCAS, 2017)

A Scaling-Less Newton-Raphson Pipelined Implementation for a Fixed-Point Reciprocal Operator. - Erwan Libessart; Matthieu Arzel; Cyril Lahuec; Francesco Paolo Andriulli (IEEE Signal Process. Lett., 2017)

40 Gop/s/mm2 fixed-point operators for Brain Computer Interface in 65 nm CMOS. - Erwan Libessart; Matthieu Arzel; Cyril Lahuec; Francesco Paolo Andriulli (ISCAS, 2018)

Transfer Incremental Learning using Data Augmentation. - Ghouthi Boukli Hacene; Vincent Gripon; Nicolas Farrugia; Matthieu Arzel; Michel Jézéquel (CoRR, 2018)

Quantized Guided Pruning for Efficient Hardware Implementations of Convolutional Neural Networks. - Ghouthi Boukli Hacene; Vincent Gripon; Matthieu Arzel; Nicolas Farrugia; Yoshua Bengio (CoRR, 2018)

Efficient Hardware Implementation of Incremental Learning and Inference on Chip. - Ghouthi B. Hacene; Vincent Gripon; Nicolas Farrugia; Matthieu Arzel; Michel Jézéquel (NEWCAS, 2019)

A Fully Flexible Circuit Implementation of Clique-Based Neural Networks in 65-nm CMOS. - Benoit Larras; Paul Chollet; Cyril Lahuec; Fabrice Seguin; Matthieu Arzel (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Budget Restricted Incremental Learning with Pre-Trained Convolutional Neural Networks and Binary Associative Memories. - Ghouthi Boukli Hacene; Vincent Gripon; Nicolas Farrugia; Matthieu Arzel; Michel Jézéquel (J. Signal Process. Syst., 2019)

Quantized Guided Pruning for Efficient Hardware Implementations of Deep Neural Networks. - Ghouthi Boukli Hacene; Vincent Gripon; Matthieu Arzel; Nicolas Farrugia; Yoshua Bengio (NEWCAS, 2020)

Continuous Pruning of Deep Convolutional Networks Using Selective Weight Decay. - Hugo Tessier; Vincent Gripon; Mathieu Léonardon; Matthieu Arzel; Thomas Hannagan; David Bertrand (CoRR, 2020)

Traiter et transmettre l'information à haut débit, à énergie réduite, avec flexibilité : le grand écart dans trois directions. - Matthieu Arzel (2021)

Shuffled Decoding of Serial Concatenated Convolutional Codes. - Aomar Bourenane; Matthieu Arzel; Frédéric Guilloud; Alain Thomas (ISTC, 2021)

DWT Collusion Resistant Video Watermarking Using Tardos Family Codes. - Abdul Rehman; Gaëtan Le Guelvouit; Jean Dion; Frédéric Guilloud; Matthieu Arzel (IPAS, 2022)

Leveraging Structured Pruning of Convolutional Neural Networks. - Hugo Tessier; Vincent Gripon; Mathieu Léonardon; Matthieu Arzel; David Bertrand; Thomas Hannagan (SiPS, 2022)

Energy Consumption Analysis of Pruned Semantic Segmentation Networks on an Embedded GPU. - Hugo Tessier; Vincent Gripon; Mathieu Léonardon; Matthieu Arzel; David Bertrand; Thomas Hannagan (SYSINT, 2022)

Rethinking Weight Decay for Efficient Neural Network Pruning. - Hugo Tessier; Vincent Gripon; Mathieu Léonardon; Matthieu Arzel; Thomas Hannagan; David Bertrand (J. Imaging, 2022)

Pipelined Architecture for a Semantic Segmentation Neural Network on FPGA. - Hugo Le Blevec; Mathieu Léonardon; Hugo Tessier; Matthieu Arzel (ICECS, 2023)

Federated learning compression designed for lightweight communications. - Lucas Grativol; Mathieu Léonardon; Guillaume Muller 001; Virginie Fresse; Matthieu Arzel (ICECS, 2023)

Simulating Aerial Event-Based Environment: Application to Car Detection. - Ismail Amessegher; Hajer Fradi; Clémence Liard; Jean-Philippe Diguet; Panagiotis Papadakis; Matthieu Arzel (ERF (1), 2024)

FLoCoRA: Federated Learning Compression with Low-Rank Adaptation. - Lucas Grativol; Mathieu Léonardon; Guillaume Muller 001; Virginie Fresse; Matthieu Arzel (EUSIPCO, 2024)

Sparse Coding Techniques for Adjustable Lossy Compression of Baseband Signals in Centralized and Virtualized Communication Systems. - Thibault Piana; Abdeldjalil Aïssa-El-Bey; Matthieu Arzel; Alain Thomas (EUSIPCO, 2024)

PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC. - Lucas Grativol; Lubin Gauthier; Mathieu Léonardon; Jérémy Morlier; Antoine Lavrard-Meyer; Guillaume Muller 001; Virginie Fresse; Matthieu Arzel (ISCAS, 2024)

FPGA-Oriented Design Space Exploration of a Real-Time Road Scene Semantic Segmentation Deep Neural Network. - Hugo Le Blevec; Mathieu Léonardon; Stefan Weithoffer; Matthieu Arzel (FPGA, 2025)