Hierarchical parametric test metrics estimation: A ΣΔ converter BIST case study. - Matthieu Dubois; Haralampos-G. D. Stratigopoulos; Salvador Mir (ICCD, 2009)

A frequency measurement BIST implementation targeting gigahertz application. - Matthieu Dubois; Emeric de Foucauld; Christopher Mounet; Serigne Dia; Cedric Mayor (ITC, 2012)

Evaluation of digital ternary stimuli for dynamic test of ΣΔ ADCs. - Matthieu Dubois; Haralampos-G. D. Stratigopoulos; Salvador Mir; Manuel J. Barragán (VLSI-SoC, 2014)

Statistical Evaluation of Digital Techniques for $ sum varDelta$ ADC BIST. - Matthieu Dubois; Haralampos-G. D. Stratigopoulos; Salvador Mir; Manuel J. Barragán (VLSI-SoC (Selected Papers), 2014)

A Fully-Digital BIST Wrapper Based on Ternary Test Stimuli for the Dynamic Test of a 40 nm CMOS 18-bit Stereo Audio ΣΔ ADC. - Manuel J. Barragán; Rshdee Alhakim; Haralampos-G. D. Stratigopoulos; Matthieu Dubois; Salvador Mir; Hervé Le Gall; Neha Bhargava; Ankur Bal (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Zero-Shot Machine-Generated Text Detection Using Mixture of Large Language Models. - Matthieu Dubois; François Yvon; Pablo Piantanida (CoRR, 2024)

MOSAIC: Multiple Observers Spotting AI Content. - Matthieu Dubois; François Yvon; Pablo Piantanida (ACL (Findings), 2025)

MOSAIC at GENAI Detection Task 3 : Zero-Shot Detection Using an Ensemble of Models. - Matthieu Dubois; François Yvon; Pablo Piantanida (COLING Workshops, 2025)