LusSy: A Toolbox for the Analysis of Systems-on-a-Chip at the Transactional Level. - Matthieu Moy; Florence Maraninchi; Laurent Maillet-Contoz (ACSD, 2005)

Pinapa: an extraction tool for SystemC descriptions of systems-on-a-chip. - Matthieu Moy; Florence Maraninchi; Laurent Maillet-Contoz (EMSOFT, 2005)

LusSy: An open tool for the analysis of systems-on-a-chip at the transaction level. - Matthieu Moy; Florence Maraninchi; Laurent Maillet-Contoz (Des. Autom. Embed. Syst., 2005)

Techniques and Tools for the Verification of Systems-on-a-Chip at the Transaction Level. (Techniques et outils pour la vérification de Systèmes-sur-Puce au niveau transaction). - Matthieu Moy (2005)

Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-Chip. - Claude Helmstetter; Florence Maraninchi; Laurent Maillet-Contoz; Matthieu Moy (FMCAD, 2006)

A SystemC/TLM Semantics in Promelaand Its Possible Applications. - Claus Traulsen; Jérôme Cornet; Matthieu Moy; Florence Maraninchi (SPIN, 2007)

Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form. - Loïc Besnard; Thierry Gautier; Matthieu Moy; Jean-Pierre Talpin; Kenneth Johnson; Florence Maraninchi (Electron. Commun. Eur. Assoc. Softw. Sci. Technol., 2009)

ac2lus: Bringing SMT-Solving and Abstract Interpretation Techniques to Real-Time Calculus through the Synchronous Language Lustre. - Karine Altisen; Matthieu Moy (ECRTS, 2010)

PinaVM: a systemC front-end based on an executable intermediate representation. - Kevin Marquet; Matthieu Moy (EMSOFT, 2010)

A Theoretical and Experimental Review of SystemC Front-ends. - Kevin Marquet; Bageshri Karkare; Matthieu Moy (FDL, 2010)

Arrival Curves for Real-Time Calculus: The Causality Problem and Its Solutions. - Matthieu Moy; Karine Altisen (TACAS, 2010)

Performance Evaluation of Components Using a Granularity-based Interface Between Real-Time Calculus and Timed Automata - Karine Altisen; Yanhong Liu; Matthieu Moy (QAPL, 2010)

jTLM: An experimentation framework for the simulation of transaction-level models of Systems-on-Chip. - Giovanni Funchal; Matthieu Moy (DATE, 2011)

Efficient and playful tools to teach Unix to new students. - Matthieu Moy (ITiCSE, 2011)

Modeling of time in discrete-event simulation of systems-on-chip. - Giovanni Funchal; Matthieu Moy (MEMOCODE, 2011)

Succinct Representations for Abstract Interpretation - Combined Analysis Algorithms and Experimental Evaluation. - Julien Henry; David Monniaux; Matthieu Moy (SAS, 2012)

Succinct Representations for Abstract Interpretation - Julien Henry; David Monniaux; Matthieu Moy (CoRR, 2012)

PAGAI: a path sensitive static analyzer - Julien Henry; David Monniaux; Matthieu Moy (CoRR, 2012)

PAGAI: A Path Sensitive Static Analyser. - Julien Henry; David Monniaux; Matthieu Moy (TAPAS@SAS, 2012)

System-level modeling of energy in TLM for early validation of power and thermal management. - Tayeb Bouhadiba; Matthieu Moy; Florence Maraninchi (DATE, 2013)

Fast and accurate TLM simulations using temporal decoupling for FIFO-based communications. - Claude Helmstetter; Jérôme Cornet; Bruno Galilée; Matthieu Moy; Pascal Vivet (DATE, 2013)

Parallel programming with SystemC for loosely timed models: a non-intrusive approach. - Matthieu Moy (DATE, 2013)

Co-simulation of Functional SystemC TLM Models with Power/Thermal Solvers. - Tayeb Bouhadiba; Matthieu Moy; Florence Maraninchi; Jérôme Cornet; Laurent Maillet-Contoz; Ilija Materic (IPDPS Workshops, 2013)

Modélisation à haut niveau d'abstraction pour les systèmes embarqués. (High-level Models for Embedded Systems). - Matthieu Moy (2014)

Modélisation à haut niveau d'abstraction pour les systèmes embarqués. - Matthieu Moy (Tech. Sci. Informatiques, 2014)

Challenges for the parallelization of loosely timed SystemC programs. - Denis Becker; Matthieu Moy; Jérôme Cornet (RSP, 2015)

WCET analysis in shared resources real-time systems with TDMA buses. - Hamza Rihani; Matthieu Moy; Claire Maiza; Sebastian Altmeyer (RTNS, 2015)

Response Time Analysis of Synchronous Data Flow Programs on a Many-Core Processor. - Hamza Rihani; Matthieu Moy; Claire Maiza; Robert I. Davis 001; Sebastian Altmeyer (RTNS, 2016)

Causality problem in real-time calculus. - Karine Altisen; Matthieu Moy (Formal Methods Syst. Des., 2016)

Modeling Power Consumption and Temperature in TLM Models. - Matthieu Moy; Claude Helmstetter; Tayeb Bouhadiba; Florence Maraninchi (Leibniz Trans. Embed. Syst., 2016)

Parallel code generation of synchronous programs for a many-core architecture. - Amaury Graillat; Matthieu Moy; Pascal Raymond; Benoît Dupont de Dinechin (DATE, 2018)

Estimating the Impact of Architectural and Software Design Choices on Dynamic Allocation of Heterogeneous Memories. - Tristan Delizy; Stephane Gros; Kevin Marquet; Matthieu Moy; Tanguy Risset; Guillaume Salagnac (RSP, 2018)

Response time analysis of dataflow applications on a many-core processor with shared-memory and network-on-chip. - Amaury Graillat; Claire Maiza; Matthieu Moy; Pascal Raymond; Benoît Dupont de Dinechin (RTNS, 2019)

Standard-compliant Parallel SystemC simulation of Loosely-Timed Transaction Level Models. - Gabriel Busnot; Tanguy Sassolas; Nicolas Ventroux; Matthieu Moy (ASP-DAC, 2020)

Scaling Up the Memory Interference Analysis for Hard Real-Time Many-Core Systems. - Maximilien Dupont de Dinechin; Matheus Schuh; Matthieu Moy; Claire Maiza (DATE, 2020)

Promise Plus: Flexible Synchronization for Parallel Computations on Arrays. - Amaury Maillé; Ludovic Henrio; Matthieu Moy (FSEN, 2021)

S4BXI: the MPI-ready Portals 4 Simulator. - Julien Emmanuel; Matthieu Moy; Ludovic Henrio; Grégoire Pichon (MASCOTS, 2021)

Standard-compliant parallel SystemC simulation of loosely-timed transaction level models: From baremetal to Linux-based applications support. - Gabriel Busnot; Tanguy Sassolas; Nicolas Ventroux; Matthieu Moy (Integr., 2021)

An Optimised Flow for Futures: From Theory to Practice. - Nicolas Chappe; Ludovic Henrio; Amaury Maillé; Matthieu Moy; Hadrien Renaud (Art Sci. Eng. Program., 2022)

Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory. - Bruno Ferres; Oussama Oulkaid; Ludovic Henrio; Mehdi Khosravian Ghadikolaei; Matthieu Moy; Gabriel Radanne; Pascal Raymond (DATE, 2023)

A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving. - Oussama Oulkaid; Bruno Ferres; Matthieu Moy; Pascal Raymond; Mehdi Khosravian; Ludovic Henrio; Gabriel Radanne (DATE, 2024)