STEPS: Experimenting a New Software-Based Strategy for Testing SoCs Containing P1500-Compliant IP Cores. - Mounir Benabdenbi; Alain Greiner; François Pêcheux; Emmanuel Viaud; Matthieu Tuna (DATE, 2004)

High Level Synthesis Methodology from C to FPGA Used for a Network Protocol Communication. - M. Diaby; Matthieu Tuna; Jean Lou Desbarbieux; Franck Wajsbürt (IEEE International Workshop on Rapid System Prototyping, 2004)

At-Speed Testing of Core-Based System-on-Chip Using an Embedded Micro-Tester. - Matthieu Tuna; Mounir Benabdenbi; Alain Greiner (VTS, 2007)

A logic sharing synthesis tool for mutually exclusive applications. - Alp Kiliç; Zied Marrakchi; Matthieu Tuna; Habib Mehrez (DTIS, 2012)

Design for prototyping of a parameterizable cluster-based Multi-Core System-on-Chip on a multi-FPGA board. - Qingshan Tang; Habib Mehrez; Matthieu Tuna (RSP, 2012)

Automatic Design Flow for Creating a Custom Multi-FPGA Board Netlist. - Qingshan Tang; Matthieu Tuna; Zied Marrakchi; Habib Mehrez (ARC, 2013)

Routing algorithm for multi-FPGA based systems using multi-point physical tracks. - Qingshan Tang; Matthieu Tuna; Habib Mehrez (RSP, 2013)

Performance Comparison between Multi-FPGA Prototyping Platforms: Hardwired Off-the-Shelf, Cabling, and Custom. - Qingshan Tang; Matthieu Tuna; Habib Mehrez (FCCM, 2014)

Future inter-FPGA communication architecture for multi-FPGA based prototyping (abstract only). - Qingshan Tang; Matthieu Tuna; Habib Mehrez (FPGA, 2014)

Multi-FPGA prototyping board issue: the FPGA I/O bottleneck. - Qingshan Tang; Habib Mehrez; Matthieu Tuna (ICSAMOS, 2014)