High-speed 8:1 multiplexer and 1:8 demultiplexer implemented with AlGaAs/GaAs HBTs. - Randy B. Nubling; James Yu; Keh-Chung Wang; Peter M. Asbeck; Neng-Huang Sheng; Mau-Chung Frank Chang; Richard L. Pierson; Gerard J. Sullivan; Mark A. McDonald; A. J. Price; A. D. M. Chen (IEEE J. Solid State Circuits, 1991)

A high-speed multimodulus HBT prescaler for frequency synthesizer applications. - Neng-Huang Sheng; Richard L. Pierson; Keh-Chung Wang; Randy B. Nubling; Peter M. Asbeck; Mau-Chung Frank Chang; W. L. Edwards; D. E. Philips (IEEE J. Solid State Circuits, 1991)

A 15-GHz gate array implemented with AlGaAs/GaAs heterojunction bipolar transistors. - Keh-Chung Wang; Peter M. Asbeck; Mau-Chung Frank Chang; Randy B. Nubling; Richard L. Pierson; Neng-Huang Sheng; Gerard J. Sullivan; Jimmy Yu; Andy Chen 001; Don Clement; Tom C.-T. Tsen; Haris F. Basit; et al. (IEEE J. Solid State Circuits, 1991)

Thermal design and simulation of bipolar integrated circuits. - Ken Poulton; Knud L. Knudsen; John J. Corcoran; Keh-Chung Wang; Richard L. Pierson; Randall B. Nubling; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 1992)

AlGaAs/GaAs HBT IC's for high-speed lightwave transmission systems. - Klaus Runge; Detlef Daniel; R. D. Standley; James L. Gimlett; Randall B. Nubling; Richard L. Pierson; Steve M. Beccue; Keh-Chung Wang; Neng-Huang Sheng; Mau-Chung Frank Chang; Dong Ming Chen 001; Peter M. Asbeck (IEEE J. Solid State Circuits, 1992)

Diode-HBT-logic circuits monolithically integrable with ECl/CML circuits. - Keh-Chung Wang; Steve M. Beccue; Mau-Chung Frank Chang; Randall B. Nubling; Arthur M. Cappon; Tom C.-T. Tsen; Dong Ming Chen 001; Peter M. Asbeck; Chung Y. Kwok (IEEE J. Solid State Circuits, 1992)

11.6-GHz 1:4 regenerating demultiplexer with bit-rotation control and 6.1-GHz auto-latching phase-aligner ICs using AlGaAs/GaAs HBT technology. - Mehran Bagheri; Keh-Chung Wang; Mau-Chung Frank Chang; Randy B. Nubling; Peter M. Asbeck; Andy Chen 001 (IEEE J. Solid State Circuits, 1992)

GaAs-based heterojunction bipolar transistors for very high performance electronic circuits. - Peter M. Asbeck; Mau-Chung Frank Chang; Keh-Chung Wang; Gerard J. Sullivan; Derek T. Cheung (Proc. IEEE, 1993)

A 6-b, 4 GSa/s GaAs HBT ADC. - Ken Poulton; Knud L. Knudsen; John J. Corcoran; Keh-Chung Wang; Randy B. Nubling; Richard L. Pierson; Mau-Chung Frank Chang; Peter M. Asbeck; R. T. Huang (IEEE J. Solid State Circuits, 1995)

High-frequency application of MOS compact models and their development for scalable RF model libraries. - David R. Pehlke; Michael Schroter; A. Burstein; Mishel Matloubian; M. Frank Chang (CICC, 1998)

A 3-V monolithic SiGe HBT power amplifier for dual-mode (CDMA/AMPS) cellular handset applications. - Pei-Der Tseng; Liyang Zhang; Guang-Bo Gao; M. Frank Chang (IEEE J. Solid State Circuits, 2000)

RF/wireless interconnect for inter- and intra-chip communications. - Mau-Chung Frank Chang; Vwani P. Roychowdhury; Liyang Zhang; Hyunchol Shin; Yongxi Qian (Proc. IEEE, 2001)

On-chip RF spiral inductors and bandpass filters using active magnetic energy recovery. - Yi-Cheng Wu; M. Frank Chang (CICC, 2002)

Reconfigurable interconnect for next generation systems. - Ingrid Verbauwhede; M.-C. Frank Chang (SLIP, 2002)

A 1.3-GHz IF digitizer using a 4th-order continuous-time bandpass ΔΣ modulator. - Todd S. Kaplan; Jose M. Cruz-Albrecht; Mehran Mokttari; Dave Mattews; Joseph F. Jensen; M. Frank Chang (CICC, 2003)

A 2-Gb/s/pin source synchronous CDMA bus interface with simultaneous multi-chip access and reconfigurable I/O capability. - Jongsun Kim; Zhiwei Xu 003; M. Frank Chang (CICC, 2003)

A 10-b, 1-GSample/s track-and-hold amplifier using SiGe BiCMOS technology. - Alireza Razzaghi; M.-C. Frank Chang (CICC, 2003)

Reconfigurable memory bus systems using multi-Gbps/pin CDMA I/O transceivers. - Jongsun Kim; Zhiwei Xu 003; Mau-Chung Frank Chang (ISCAS (2), 2003)

A 1.8-V 6/9-GHz reconfigurable dual-band quadrature LC VCO in SiGe BiCMOS technology. - Hyunchol Shin; Zhiwei Xu 003; M. Frank Chang (IEEE J. Solid State Circuits, 2003)

A simple DDS architecture with highly efficient sine function lookup table. - Zhengyu Wang; M.-C. Frank Chang; Jessica Chiatai Chou (ACM Great Lakes Symposium on VLSI, 2004)

A self-synchronized RF-interconnect for 3-dimensional integrated circuits. - Qun Gu; Zhiwei Xu 003; Jenwei Ko; Szukang Hsien; M. Frank Chang (ISCAS (4), 2004)

Design of a 1.8 V 4.9 5.9 GHz CMOS broadband low noise amplifier with 0.28 dB gain flatness using AMER inductor loads. - Yin-Lung Lu; Yi-Cheng Wu; Kyung-Wan Yu; Wei-Li Chen; M. Frank Chang (ISCAS (1), 2004)

Three-dimensional impedance engineering for mixed-signal system-on-chip applications. - Kyuchul Chong; Xi Zhang; King-Ning Tu; Daquan Huang; Mau-Chung Frank Chang; Ya-Hong Xie (CICC, 2005)

CDMA/FDMA-interconnects for future ULSI communications. - M. Frank Chang (ICCAD, 2005)

A 1-GHz signal bandwidth 6-bit CMOS ADC with power-efficient averaging. - Xicheng Jiang; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2005)

A 2-GS/s 3-bit ΔΣ-modulated DAC with tunable bandpass mismatch shaping. - Todd S. Kaplan; Joseph F. Jensen; Charles H. Fields; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2005)

A 5.6-mW 1-Gb/s/pair pulsed signaling transceiver for a fully AC coupled bus. - Jongsun Kim; Ingrid Verbauwhede; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2005)

A CMOS passive mixer with low flicker noise for low-power direct-conversion receiver. - Sining Zhou; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2005)

Active 2nd-order intermodulation calibration for direct-conversion receivers. - Minghui Chen; Yue Wu; M. Frank Chang (ISSCC, 2006)

A 60GHz CMOS VCO Using On-Chip Resonator with Embedded Artificial Dielectric for Size, Loss and Noise Reduction. - Daquan Huang; William Hant; Ning-Yi Wang; Tai W. Ku; Qun Gu; Raymond Wong; Mau-Chung Frank Chang (ISSCC, 2006)

Two 10Gb/s/pin Low-Power Interconnect Methods for 3D ICs. - Qun Gu; Zhiwei Xu 003; Jenwei Ko; Mau-Chung Frank Chang (ISSCC, 2007)

Can RF Help CMOS Processors? [Topics in Circuits for Communications]. - Eran Socher; Mau-Chung Frank Chang (IEEE Commun. Mag., 2007)

Design of an Interconnect Architecture and Signaling Technology for Parallelism in Communication. - Jongsun Kim; Ingrid Verbauwhede; M.-C. Frank Chang (IEEE Trans. Very Large Scale Integr. Syst., 2007)

CMP network-on-chip overlaid with multi-band RF-interconnect. - M. Frank Chang; Jason Cong; Adam Kaplan; Mishali Naik; Glenn Reinman; Eran Socher; Sai-Wang Tam (HPCA, 2008)

Lower-Complexity Layered Belief-Propagation Decoding of LDPC Codes. - Yuan-Mao Chang; Andres I. Vila Casado; Mau-Chung Frank Chang; Richard D. Wesel (ICC, 2008)

RF interconnects for communications on-chip. - M.-C. Frank Chang; Eran Socher; Sai-Wang Tam; Jason Cong; Glenn Reinman (ISPD, 2008)

324GHz CMOS Frequency Generator Using Linear Superposition Technique. - Daquan Huang; Tim R. LaRocca; Lorene Samoska; Andy Fung; M.-C. Frank Chang (ISSCC, 2008)

Power reduction of CMP communication networks via RF-interconnects. - M.-C. Frank Chang; Jason Cong; Adam Kaplan; Chunyue Liu; Mishali Naik; Jagannath Premkumar; Glenn Reinman; Eran Socher; Sai-Wang Tam (MICRO, 2008)

A Low Power V-Band CMOS Frequency Divider With Wide Locking Range and Accurate Quadrature Output Phases. - Qun Gu; Zhiwei Xu 003; Daquan Huang; Tim R. LaRocca; Ning-Yi Wang; William Hant; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2008)

Terahertz CMOS Frequency Generator Using Linear Superposition Technique. - Daquan Huang; Tim R. LaRocca; Mau-Chung Frank Chang; Lorene Samoska; Andy Fung; Richard L. Campbell; Michael Andrews (IEEE J. Solid State Circuits, 2008)

A Cost-Effective Latency-Aware Memory Bus for Symmetric Multiprocessor Systems. - Jongsun Kim; Bo-Cheng Lai; Mau-Chung Frank Chang; Ingrid Verbauwhede (IEEE Trans. Computers, 2008)

Delta-Sigma D/A Converter Using Binary- Weighted Digital-to-Analog Differentiator for Second-Order Mismatch Shaping. - Heng-Yu Jian; Zhiwei Xu 003; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A 600-MSPS 8-bit CMOS ADC Using Distributed Track-and-Hold With Complementary Resistor/Capacitor Averaging. - Zhengyu Wang; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

A 1-V 1.25-GS/S 8-Bit Self-Calibrated Flash ADC in 90-nm Digital CMOS. - Hairong Yu; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Compact Dual-Band Direct Conversion CMOS Transceiver. - M.-C. Frank Chang; Charles Chien; Zhiwei Xu 003 (Encyclopedia of Wireless and Mobile Communications, 2008)

A scalable micro wireless interconnect structure for CMPs. - Suk-Bok Lee; Sai-Wang Tam; Ioannis Pefkianakis; Songwu Lu; M. Frank Chang; Chuanxiong Guo; Glenn Reinman; Chunyi Peng 001; Mishali Naik; Lixia Zhang 001; Jason Cong (MobiCom, 2009)

Multiband RF-interconnect for reconfigurable network-on-chip communications. - Jason Cong; Mau-Chung Frank Chang; Glenn Reinman; Sai-Wang Tam (SLIP, 2009)

Robust On-Chip Signaling by Staggered and Twisted Bundle. - Hao Yu 001; Lei He 001; Mau-Chung Frank Chang (IEEE Des. Test Comput., 2009)

60 GHz CMOS Amplifiers Using Transformer-Coupling and Artificial Dielectric Differential Transmission Lines for Compact Design. - Tim R. LaRocca; Jenny Yi-Chun Liu; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2009)

D-band CMOS transmitter and receiver for multi-giga-bit/sec wireless data link. - Zhiwei Xu 003; Qun Jane Gu; Yi-Cheng Wu; Adrian Tang 002; Yu-Ling Lin; Ho-Hsian Chen; Chewnpu Jou; Mau-Chung Frank Chang (CICC, 2010)

A low phase noise, wideband and compact CMOS PLL for use in a heterodyne 802.15.3c TRX. - David Murphy; Qun Jane Gu; Yi-Cheng Wu; Heng-Yu Jian; Zhiwei Xu 003; Adrian Tang 002; Frank Wang; Yu-Ling Lin; Ho-Hsian Chen; Chewnpu Jou; Mau-Chung Frank Chang (ESSCIRC, 2010)

A Fractional- PLL for Multiband (0.8-6 GHz) Communications Using Binary-Weighted D/A Differentiator and Offset-Frequency Δ-Σ Modulator. - Heng-Yu Jian; Zhiwei Xu 003; Yi-Cheng Wu; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2010)

RF-Interconnect for Future Network-On-Chip. - Sai-Wang Tam; Eran Socher; Mau-Chung Frank Chang; Jason Cong; Glenn D. Reinman (Low Power Networks-on-Chip, 2011)

A 7Gb/s SC-FDE/OFDM MMSE equalizer for 60GHz wireless communications. - Frank Hsiao; Adrian Tang 002; Derek Yang; Mike Pham; Mau-Chung Frank Chang (A-SSCC, 2011)

A 40-mW 7-bit 2.2-GS/s time-interleaved subranging ADC for low-power gigabit wireless communications in 65-nm CMOS. - I-Ning Ku; Zhiwei Xu 003; Yen-Cheng Kuan; Yen-Hsiang Wang; Mau-Chung Frank Chang (CICC, 2011)

The DIMM tree architecture: A high bandwidth and scalable memory system. - Kanit Therdsteerasukdi; Gyungsu Byun; Jeremy Ir; Glenn Reinman; Jason Cong; M. Frank Chang (ICCD, 2011)

A progammable baseband anti-alias filter for a passive-mixer-based, SAW-less, multi-band, multi-mode WEDGE transmitter. - Sandeep D'Souza; Mau-Chung Frank Chang; Sudhakar Pamarti; Bipul Agarwal; Hossein Zarei; Tirdad Sowlati; Roc Berenguer (ISCAS, 2011)

An 8.4Gb/s 2.5pJ/b mobile memory I/O interface using simultaneous bidirectional Dual (Base+RF) band signaling. - Gyungsu Byun; Yanghyo Kim; Jongsun Kim; Sai-Wang Tam; Hsieh-Hung Hsieh; P.-Y. Wu; Chewnpu Jou; Jason Cong; Glenn Reinman; Mau-Chung Frank Chang (ISSCC, 2011)

A 10b resistor-resistor-string DAC with current compensation for compact LCD driver ICs. - Chih-Wen Lu; Ping-Yeh Yin; Ching-Min Hsiao; Mau-Chung Frank Chang (ISSCC, 2011)

183GHz 13.5mW/pixel CMOS regenerative receiver for mm-wave imaging applications. - Adrian Tang 002; Mau-Chung Frank Chang (ISSCC, 2011)

RF/wireless-interconnect: The next wave of connectivity. - Sai-Wang Tam; Mau-Chung Frank Chang (Sci. China Inf. Sci., 2011)

CMOS receivers for active and passive mm-wave imaging. - Adrian Tang 002; Qun Jane Gu; Mau-Chung Frank Chang (IEEE Commun. Mag., 2011)

A Low-Overhead and Low-Power RF Transceiver for Short-Distance On- and Off-Chip Interconnects. - Jongsun Kim; Gyungsu Byun; M. Frank Chang (IEICE Trans. Electron., 2011)

A 60 GHz High Gain Transformer-Coupled Differential Cascode Power Amplifier in 65 nm CMOS. - Jenny Yi-Chun Liu; Mau-Chung Frank Chang (IEICE Trans. Electron., 2011)

A Low Phase Noise, Wideband and Compact CMOS PLL for Use in a Heterodyne 802.15.3c Transceiver. - David Murphy; Qun Jane Gu; Yi-Cheng Wu; Heng-Yu Jian; Zhiwei Xu 003; Adrian Tang 002; Frank Wang; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2011)

CMOS Prescaler(s) With Maximum 208-GHz Dividing Speed and 37-GHz Time-Interleaved Dual-Injection Locking Range. - Qun Jane Gu; Heng-Yu Jian; Zhiwei Xu 003; Yi-Cheng Wu; Mau-Chung Frank Chang; Yves Baeyens; Young-Kai Chen (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

A 60GHz on-chip RF-Interconnect with λ/4 coupler for 5Gbps bi-directional communication and multi-drop arbitration. - Hao Wu 026; Lan Nan; Sai-Wang Tam; Hsieh-Hung Hsieh; Chewnpu Jou; Glenn Reinman; Jason Cong; Mau-Chung Frank Chang (CICC, 2012)

A 144GHz 0.76cm-resolution sub-carrier SAR phase radar for 3D imaging in 65nm CMOS. - Adrian Tang 002; Gabriel Virbila; David Murphy; Frank Hsiao; Yen-Hsiang Wang; Qun Jane Gu; Zhiwei Xu 003; Y. Wu; M. Zhu; Mau-Chung Frank Chang (ISSCC, 2012)

An 8Gb/s/pin 4pJ/b/pin Single-T-Line dual (base+RF) band simultaneous bidirectional mobile memory I/O interface with inter-channel interference suppression. - Yanghyo Kim; Gyungsu Byun; Adrian Tang 002; Chewnpu Jou; Hsieh-Hung Hsieh; Glenn Reinman; Jason Cong; Mau-Chung Frank Chang (ISSCC, 2012)

A blocker-tolerant wideband noise-cancelling receiver with a 2dB noise figure. - David Murphy; Amr Hafez; Ahmad Mirzaei; Mohyee Mikhemar; Hooman Darabi; Mau-Chung Frank Chang; Asad A. Abidi (ISSCC, 2012)

A low-overhead self-healing embedded system for ensuring high yield and long-term sustainability of 60GHz 4Gb/s radio-on-a-chip. - Adrian Tang 002; Frank Hsiao; David Murphy; I-Ning Ku; Jenny Yi-Chun Liu; Sandeep D'Souza; Ning-Yi Wang; Hao Wu 026; Yen-Hsiang Wang; Mandy Tang; Gabriel Virbila; Mike Pham; et al. (ISSCC, 2012)

Dual-Control Self-Healing Architecture for High-Performance Radio SoCs. - Charles Chien; Adrian Tang 002; Frank Hsiao; Mau-Chung Frank Chang (IEEE Des. Test, 2012)

Analysis of Noncoherent ASK Modulation-Based RF-Interconnect for Memory Interface. - Yanghyo Kim; Sai-Wang Tam; Gyungsu Byun; Hao Wu 026; Lan Nan; Glenn Reinman; Jason Cong; Mau-Chung Frank Chang (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Utilizing Radio-Frequency Interconnect for a Many-DIMM DRAM System. - Kanit Therdsteerasukdi; Gyungsu Byun; Jeremy Ir; Glenn Reinman; Jason Cong; Mau-Chung Frank Chang (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

An Energy-Efficient and High-Speed Mobile Memory I/O Interface Using Simultaneous Bi-Directional Dual (Base+RF)-Band Signaling. - Gyungsu Byun; Yanghyo Kim; Jongsun Kim; Sai-Wang Tam; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2012)

A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications. - I-Ning Ku; Zhiwei Xu 003; Yen-Cheng Kuan; Yen-Hsiang Wang; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2012)

A Compact and Low Power 5-10 GHz Quadrature Local Oscillator for Cognitive Radio Applications. - Jianhua Lu; Ning-Yi Wang; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2012)

A 10-bit Resistor-Floating-Resistor-String DAC (RFR-DAC) for High Color-Depth LCD Driver ICs. - Chih-Wen Lu; Ping-Yeh Yin; Ching-Min Hsiao; Mau-Chung Frank Chang; Yo-Sheng Lin (IEEE J. Solid State Circuits, 2012)

A Blocker-Tolerant, Noise-Cancelling Receiver Suitable for Wideband Wireless Applications. - David Murphy; Hooman Darabi; Asad A. Abidi; Amr Amin Hafez; Ahmad Mirzaei; Mohyee Mikhemar; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2012)

Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system. - Kanit Therdsteerasukdi; Gyungsu Byun; Jason Cong; M. Frank Chang; Glenn Reinman (ACM Trans. Archit. Code Optim., 2012)

A CMOS Integrated W-band Passive Imager. - Qun Jane Gu; Kang Yang; Yi Xue; Zhiwei Xu 003; Adrian Tang 002; Chin-Chung Nien; T. H. Wu; Jenn-Hwan Tarng; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

A 100Gb/s quad-rate transformer-coupled injection-locking CDR circuit in 65nm CMOS. - Fanta Chen; Jen-Ming Wu; Jenny Yi-Chun Liu; Mau-Chung Frank Chang (ISCAS, 2013)

A 294 GHz 0.47mW caterpillar amplifier based transmitter in 65nm CMOS For THz data-links. - Adrian Tang 002; Mau-Chung Frank Chang (RWS, 2013)

Stream arbitration: Towards efficient bandwidth utilization for emerging on-chip interconnects. - Chunhua Xiao; M.-C. Frank Chang; Jason Cong; Michael Gill; Zhangqin Huang; Chunyue Liu; Glenn Reinman; Hao Wu 026 (ACM Trans. Archit. Code Optim., 2013)

A 10-Bit 2-GS/s DAC-DDFS-IQ-Controller Baseband Enabling a Self-Healing 60-GHz Radio-on-Chip. - Sandeep D'Souza; Frank Hsiao; Adrian Tang 002; Sai-Wang Tam; Roc Berenguer; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

CMOS (Sub)-mm-Wave System-on-Chip for exploration of deep space and outer planetary systems. - Adrian Tang 002; Mau-Chung Frank Chang; Goutam Chattopadhyay; Z. Chen; Theodore Reck; H. Schone; Y. Zhao; L. Du; David Murphy; N. Chahat; E. Decrossas; I. Mehdi (CICC, 2014)

Concurrent Design Analysis of High-Linearity SP10T Switch With 8.5 kV ESD Protection. - X. Shawn Wang; Xin Wang 031; Fei Lu 004; Chen Zhang 017; Zongyu Dong; Li Wang 058; Rui Ma 003; Zitao Shi; Albert Z. Wang; Mau-Chung Frank Chang; Dawn Wang; Alvin J. Joseph; et al. (IEEE J. Solid State Circuits, 2014)

A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector. - Fanta Chen; Min-Sheng Kao; Yu-Hao Hsu; Jen-Ming Wu; Ching-Te Chiu; Shawn S. H. Hsu; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

An LTV Analysis of the Frequency Translational Noise-Cancelling Receiver. - David Murphy; Ahmad Mirzaei; Hooman Darabi; Mau-Chung Frank Chang; Asad A. Abidi (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

A 5.4-mW 4-Gb/s 5-band QPSK transceiver for frequency-division multiplexing memory interface. - Wei-Han Cho; Yilei Li; Yanghyo Kim; Po-Tsang Huang; Yuan Du; Sheau Jiung Lee; Mau-Chung Frank Chang (CICC, 2015)

A 2.2 GS/s 188mW spectrometer processor in 65nm CMOS for supporting low-power THz planetary instruments. - Frank Hsiao; Adrian Tang 002; Y. Kim; Brian J. Drouin; Goutam Chattopadhyay; M.-C. Frank Chang (CICC, 2015)

14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dB. - Zuow-Zun Chen; Yen-Hsiang Wang; Jaewook Shin; Yan Zhao 002; Seyed Arash Mirhaj; Yen-Cheng Kuan; Huan-Neng Ron Chen; Chewnpu Jou; Ming-Hsien Tsai 002; Fu-Lung Hsueh; Mau-Chung Frank Chang (ISSCC, 2015)

6.7 A 2.3mW 11cm-range bootstrapped and correlated-double-sampling (BCDS) 3D touch sensor for mobile devices. - Li Du; Yan Zhang 050; Frank Hsiao; Adrian Tang 002; Yan Zhao 002; Yilei Li; Zuow-Zun Chen; Liting Huang; Mau-Chung Frank Chang (ISSCC, 2015)

2.1 A highly linear inductorless wideband receiver with phase- and thermal-noise cancellation. - Hao Wu 026; Mohyee Mikhemar; David Murphy; Hooman Darabi; Mau-Chung Frank Chang (ISSCC, 2015)

A low-PDP and low-area repeater using passive CTLE for on-chip interconnects. - Ming-Shuan Chen; Mau-Chung Frank Chang; Chih-Kong Ken Yang (VLSIC, 2015)

A Blocker-Tolerant Inductor-Less Wideband Receiver With Phase and Thermal Noise Cancellation. - Hao Wu 026; Mohyee Mikhemar; David Murphy; Hooman Darabi; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2015)

40-Gb/s 0.7-V 2: 1 MUX and 1: 2 DEMUX with Transformer-Coupled Technique for SerDes Interface. - Fanta Chen; Jen-Ming Wu; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Wireless Gigabit Data Telemetry for Large-Scale Neural Recording. - Yen-Cheng Kuan; Yi-Kai Lo; Yanghyo Kim; Mau-Chung Frank Chang; Wentai Liu (IEEE J. Biomed. Health Informatics, 2015)

Invited - Airtouch: a novel single layer 3D touch sensing system for human/mobile devices interactions. - Li Du; Chun-Chen Liu; Adrian Tang 002; Yan Zhang 050; Yilei Li; Kye Cheung; Mau-Chung Frank Chang (DAC, 2016)

Invited - A 2.2 GHz SRAM with high temperature variation immunity for deep learning application under 28nm. - Chun-Chen Liu; Yen-Hsiang Wang; Yilei Li; Chien-Heng Wong; Tien Pei Chou; Young-Kai Chen; M.-C. Frank Chang (DAC, 2016)

The SMEM Seeding Acceleration for DNA Sequence Alignment. - Mau-Chung Frank Chang; Yu-Ting Chen 003; Jason Cong; Po-Tsang Huang; Chun-Liang Kuo; Cody Hao Yu (FCCM, 2016)

10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4 / 16-QAM transceiver in 28nm CMOS for high-speed Memory interface. - Wei-Han Cho; Yilei Li; Yuan Du; Chien-Heng Wong; Jieqiong Du; Po-Tsang Huang; Sheau Jiung Lee; Huan-Neng Ron Chen; Chewnpu Jou; Fu-Lung Hsueh; Mau-Chung Frank Chang (ISSCC, 2016)

EE1: Class of 2025 - Where will be the best jobs? - Xicheng Jiang; Axel Thomsen; Piero Malcovati; M.-C. Frank Chang (ISSCC, 2016)

2.1 An integrated 0.56THz frequency synthesizer with 21GHz locking range and -74dBc/Hz phase noise at 1MHz offset in 65nm CMOS. - Yan Zhao 002; Zuow-Zun Chen; Gabriel Virbila; Yinuo Xu; Richard Al Hadi; Yanghyo Kim; Adrian Tang 002; Theodore Reck; Huan-Neng Ron Chen; Chewnpu Jou; Fu-Lung Hsueh; Mau-Chung Frank Chang (ISSCC, 2016)

Digital PLL for phase noise cancellation in ring oscillator-based I/Q receivers. - Zuow-Zun Chen; Yilei Li; Yen-Cheng Kuan; Boyu Hu; Chien-Heng Wong; Mau-Chung Frank Chang (VLSI Circuits, 2016)

A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS. - Yuan Du; Wei-Han Cho; Yilei Li; Chien-Heng Wong; Jieqiong Du; Po-Tsang Huang; Yanghyo Kim; Zuow-Zun Chen; Sheau Jiung Lee; Mau-Chung Frank Chang (VLSI Circuits, 2016)

A 0.56 THz Phase-Locked Frequency Synthesizer in 65 nm CMOS Technology. - Yan Zhao 002; Zuow-Zun Chen; Yuan Du; Yilei Li; Richard Al Hadi; Gabriel Virbila; Yinuo Xu; Yanghyo Kim; Adrian Tang 002; Theodore Reck; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2016)

An 8-Bit Compressive Sensing ADC With 4-GS/s Equivalent Speed Utilizing Self-Timed Pipeline SAR-Binary-Search. - Boyu Hu; Fengbo Ren; Zuow-Zun Chen; Xicheng Jiang; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

Millimeter-Wave Field Experiments with Many Antenna Configurations for Indoor Multipath Environments. - Marcus Z. Comiter; Michael B. Crouse; H. T. Kung 001; Jenn-Hwan Tarng; Zuo-Min Tsai; Wei-Ting Wu; Ta-Sung Lee; M.-C. Frank Chang; Yen-Cheng Kuan (GLOBECOM Workshops, 2017)

Terahertz systems-on-chip enabled by nano-IC technologies. - Mau-Chung Frank Chang (VLSI-DAT, 2017)

A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things. - Li Du; Yuan Du; Yilei Li; Mau-Chung Frank Chang (CoRR, 2017)

A Streaming Accelerator for Deep Convolutional Neural Networks with Image and Feature Decomposition for Resource-limited System Applications. - Yuan Du; Li Du; Yilei Li; Junjie Su; Mau-Chung Frank Chang (CoRR, 2017)

A Memristive Neural Network Computing Engine using CMOS-Compatible Charge-Trap-Transistor (CTT). - Yuan Du; Li Du; Xuefeng Gu; Xiao Wang; Mau-Chung Frank Chang (CoRR, 2017)

DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers. - Zuow-Zun Chen; Yen-Cheng Kuan; Yilei Li; Boyu Hu; Chien-Heng Wong; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2017)

A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection. - Yuan Du; Wei-Han Cho; Po-Tsang Huang; Yilei Li; Chien-Heng Wong; Jieqiong Du; Yanghyo Kim; Boyu Hu; Li Du; Chun-Chen Liu; Sheau Jiung Lee; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2017)

A 2.3-mW 11-cm Range Bootstrapped and Correlated-Double-Sampling Three-Dimensional Touch Sensing Circuit for Mobile Devices. - Li Du; Yan Zhang 050; Chun-Chen Liu; Adrian Tang 002; Frank Hsiao; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A Capacitor-DAC-Based Technique For Pre-Emphasis-Enabled Multilevel Transmitters. - Boyu Hu; Yuan Du; Rulin Huang; Jeffrey Lee; Young-Kai Chen; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

An R2R-DAC-Based Architecture for Equalization-Equipped Voltage-Mode PAM-4 Wireline Transmitter Design. - Boyu Hu; Yuan Du; Rulin Huang; Jeffrey Lee; Young-Kai Chen; Mau-Chung Frank Chang (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A fully integrated 28nm CMOS dual source adaptive thermoelectric and RF energy harvesting circuit with 110mv startup voltage. - Yiwu Tang; Chien-Heng Wong; Yuan Du; Li Du; Yilei Li; Mau-Chung Frank Chang (CICC, 2018)

High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms. - Weikang Qiao; Jieqiong Du; Zhenman Fang; Michael Lo; Mau-Chung Frank Chang; Jason Cong (FCCM, 2018)

High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms: (Abstract Only). - Weikang Qiao; Jieqiong Du; Zhenman Fang; Libo Wang; Michael Lo; Mau-Chung Frank Chang; Jason Cong (FPGA, 2018)

A 2.6GS/s Spectrometer System in 65nm CMOS for Spaceborne Telescopic Sensing. - Yan Zhang 050; Yanghyo Kim; Adrian Tang 002; Jon Kawamura; Theodore Reck; M.-C. Frank Chang (ISCAS, 2018)

A 20Gb/s 79.5mW 127GHz CMOS transceiver with digitally pre-distorted PAM-4 modulation for contactless communications. - Yanghyo Kim; Boyu Hu; Yuan Du; Adrian Tang 002; Huan-Neng Ron Chen; Chewnpu Jou; Jason Cong; Tatsuo Itoh; Mau-Chung Frank Chang (ISSCC, 2018)

A Single Layer 3-D Touch Sensing System for Mobile Devices Application. - Li Du; Chun-Chen Liu; Yan Zhang 050; Yilei Li; Yuan Du; Yen-Cheng Kuan; Mau-Chung Frank Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

A Novel Fully Synthesizable All-Digital RF Transmitter for IoT Applications. - Yilei Li; Kirti Dhwaj; Chien-Heng Wong; Yuan Du; Li Du; Yiwu Tang; Yiyu Shi 001; Tatsuo Itoh; Mau-Chung Frank Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things. - Li Du; Yuan Du; Yilei Li; Junjie Su; Yen-Cheng Kuan; Chun-Chen Liu; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A 2-GS/s 8-Bit ADC Featuring Virtual-Ground Sampling Interleaved Architecture in 28-nm CMOS. - X. Shawn Wang; Xin Jin; Jieqiong Du; Yilei Li; Yuan Du; Chien-Heng Wong; Yen-Cheng Kuan; Chi-Hang Chan; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Millimeter-Wave System-on-Chip Applications from Space Explorations to Contactless Connectivity. - Mau-Chung Frank Chang (A-SSCC, 2019)

An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch. - Eric Swindlehurst; Hunter Jensen; Alexander Petrie; Yixin Song; Yen-Cheng Kuan; Mau-Chung Frank Chang; Jieh-Tsorng Wu; Shiuh-Hua Wood Chiang (ESSCIRC, 2019)

An FPGA-Based BWT Accelerator for Bzip2 Data Compression. - Weikang Qiao; Zhenman Fang; Mau-Chung Frank Chang; Jason Cong (FCCM, 2019)

A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFET. - Jieqiong Du; Chien-Heng Wong; Yo-Hao Tu; Wei-Han Cho; Yilei Li; Yuan Du; Po-Tsang Huang; Sheau Jiung Lee; Mau-Chung Frank Chang (NOCS, 2019)

Built-In Self-Test/Repair Methodology for Multiband RF-Interconnected TSV 3D Integration. - Shu-Feng Cheng; Po-Tsang Huang; Li-Chun Wang 001; Mau-Chung Frank Chang (IEEE Des. Test, 2019)

A Millimeter-Wave CMOS Transceiver With Digitally Pre-Distorted PAM-4 Modulation for Contactless Communications. - Yanghyo Rod Kim; Boyu Hu; Yuan Du; Wei-Han Cho; Rulin Huang; Adrian Tang 002; Huan-Neng Ron Chen; Chewnpu Jou; Jason Cong; Tatsuo Itoh; Mau-Chung Frank Chang (IEEE J. Solid State Circuits, 2019)

An Analog Neural Network Computing Engine Using CMOS-Compatible Charge-Trap-Transistor (CTT). - Yuan Du; Li Du; Xuefeng Gu; Jieqiong Du; X. Shawn Wang; Boyu Hu; Mingzhe Jiang; Xiaoliang Chen; Subramanian S. Iyer; Mau-Chung Frank Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Integrated Wide-Band CMOS Spectrometer Systems for Spaceborne Telescopic Sensing. - Yan Zhang 050; Yanghyo Rod Kim; Adrian Tang 002; Jon Kawamura; Theodore Reck; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

2018 IEEE Educational Activities Board Awards. - Lorena Garcia; Ward Jewell; Mau-Chung Frank Chang; Stephen M. Goodnick; Mohd. Toaha Umar; Hunter DesRoches; Jorge L. Contreras; Richard Cliver; Franc E. Noel; Augusto J. Herrera; Aravindhan Anbazhagan; Boris I. Gramatikov; et al. (IEEE Trans. Educ., 2019)

An 8.3% Efficiency 96-134 GHz CMOS Frequency Doubler Using Distributed Amplifier and Nonlinear Transmission Line. - Shilei Hao; Yiwu Tang; Xuan Ding; Li Du; Yuan Du; Adrian Tang 002; Qun Jane Gu; Mau-Chung Frank Chang (A-SSCC, 2020)

Algorithm-Hardware Co-design for BQSR Acceleration in Genome Analysis ToolKit. - Michael Lo; Zhenman Fang; Jie Wang 022; Peipei Zhou 001; Mau-Chung Frank Chang; Jason Cong (FCCM, 2020)

Bonsai: High-Performance Adaptive Merge Tree Sorting. - Nikola Samardzic; Weikang Qiao; Vaibhav Aggarwal; Mau-Chung Frank Chang; Jason Cong (ISCA, 2020)

A 28-mW 32-Gb/s/pin 16-QAM Single-Ended Transceiver for High-Speed Memory Interface. - Jieqiong Du; Jia Zhou; Chia-Jen Liang; Boyu Hu; Yuan Du; Mau-Chung Frank Chang (VLSI Circuits, 2020)

3D On-Demand Flying Mobile Communication for Millimeter-Wave Heterogeneous Networks. - Kai-Ten Feng; Li-Hsiang Shen; Chi-Yu Li 001; Po-Tsang Huang; Sau-Hsuan Wu; Li-Chun Wang 001; Yi-Bing Lin; Mau-Chung Frank Chang (IEEE Netw., 2020)

A Reconfigurable 64-Dimension K-Means Clustering Accelerator With Adaptive Overflow Control. - Li Du; Yuan Du; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A Sub-50fs-Jitter Sub-Sampling PLL with a Harmonic-Enhanced 30-GHz-Fundemental Class-C VCO in 0.18µm SiGe BiCMOS. - Yan Zhang 050; Chia-Jen Liang; Christopher Chen; Andrew Liu; Jason Woo; Sudhakar Pamarti; Chih-Kong Ken Yang; Mau-Chung Frank Chang (ESSCIRC, 2021)

FANS: FPGA-Accelerated Near-Storage Sorting. - Weikang Qiao; Jihun Oh; Licheng Guo; Mau-Chung Frank Chang; Jason Cong (FCCM, 2021)

CTT-based Non-Volatile Deep Neural Network Accelerator Design. - Yang Xiao; Wuyu Fan; Yuan Du; Li Du; Mau-Chung Frank Chang (ISOCC, 2021)

An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch. - Eric Swindlehurst; Hunter Jensen; Alexander Petrie; Yixin Song; Yen-Cheng Kuan; Yong Qu; Mau-Chung Frank Chang; Jieh-Tsorng Wu; Shiuh-Hua Wood Chiang (IEEE J. Solid State Circuits, 2021)

Self-Synchronized DS/SS With High Spread Factors for Robust Millimeter-Wave Datalinks. - Adrian Tang 002; Rulin Huang; Gabriel Virbila; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A 14-bit 1-GS/s SiGe Bootstrap Sampler for High Resolution ADC with 250-MHz Input. - Jiazhang Song; Li-Yang Chen; Mau-Chung Frank Chang; Sudhakar Pamarti; Chih-Kong Ken Yang (ISCAS, 2022)

A 0.12-V 200-Hz-BW 10-Bit ADC Using Quad-Channel VCO and Interpolation Linearization. - Shea Smith; Taylor Barton; Yen-Cheng Kuan; Armin Tajalli; Mau-Chung Frank Chang; Shiuh-Hua Wood Chiang (A-SSCC, 2023)

HMLib: Efficient Data Transfer for HLS Using Host Memory. - Michael Lo; Young-kyu Choi; Weikang Qiao; Mau-Chung Frank Chang; Jason Cong (FPGA, 2023)

How Fault-Tolerant Quantum Computing Benefits from Cryo-CMOS Technology. - H.-L. Chiang; Richard A. Hadi; J.-F. Wang; Hung-Chi Han; J.-J. Wu; H.-H. Hsieh; J.-J. Horng; W.-S. Chou; B.-S. Lien; C.-H. Chang; Y.-C. Chen; Yeong-Her Wang; et al. (VLSI Technology and Circuits, 2023)

A 2.0 GS/s Two-Stage Quad-Channel Digital Downconverter for a 380 GHz Spaceborne Atmospheric HO Monitoring Instrument. - Adrian Tang 002; Subash Khanal; Gabriel Virbila; Nathaniel J. Livesey; Frank Werner 006; Goutam Chattopadhyay; Mau-Chung Frank Chang (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-Based FPGAs. - Weikang Qiao; Licheng Guo; Zhenman Fang; Mau-Chung Frank Chang; Jason Cong (IEEE Trans. Emerg. Top. Comput., 2023)

A Sub-Sampling 35GHz PLL in 45nm PDSOI BiCMOS with 37fs Integrated Jitter and a FoM of -252dB. - Christopher Chen; Yan Zhang 050; Hao-Yu Chien; Jiazhang Song; Jia Zhou; Chao-Jen Tien; Sudhakar Pamarti; Chih-Kong Ken Yang; Mau-Chung Frank Chang (BCICTS, 2024)

A 0.16-3.7GHz Ultra-Compact Noise-Canceling Cryogenic Low-Noise Amplifier at 4 K using 16nm FinFET Technology for Qubit Readout. - Runzhou Chen; Hamdi Mani; Phil Marsh; Richard Al Hadi; Pragya Shrestha; Jason P. Campbell; Christopher Chen; Hao-Yu Chien; Mau-Chung Frank Chang (DRC, 2024)

Photon-Mediated Charge Transport and Stability of Physically-Defined and Self-Organized Germanium Quantum Dots/SON Barriers in Few-Hole Regime at T>10K. - Chi-Cheng Lai; Yu-Wen Chiu; I-Hsiang Wang; Ting Tsai; Jhih-Wei Chen; Yen-Hsiang Wang; Mau-Chung Frank Chang; Horng-Chih Lin; Pei-Wen Li (VLSI Technology and Circuits, 2024)

Multiphysics Modeling on Photoconductive Antennas for Terahertz Applications. - Boxun Yan; Bundel Pooja; Chi-Hou Chan; Mau-Chung Frank Chang (CoRR, 2024)

SAT-Accel: A Modern SAT Solver on a FPGA. - Michael Lo; Mau-Chung Frank Chang; Jason Cong (FPGA, 2025)