On the Scalability of 1- and 2-Dimensional SIMD Extensions for Multimedia Applications. - Friman Sánchez; Mauricio Alvarez 001; Esther Salamí; Alex Ramírez; Mateo Valero (ISPASS, 2005)

HD-VideoBench. A Benchmark for Evaluating High Definition Digital Video Applications. - Mauricio Alvarez 001; Esther Salamí; Alex Ramírez; Mateo Valero (IISWC, 2007)

Performance Impact of Unaligned Memory Operations in SIMD Extensions for Video Codec Applications. - Mauricio Alvarez 001; Esther Salamí; Alex Ramírez; Mateo Valero (ISPASS, 2007)

Analysis of video filtering on the cell processor. - Arnaldo Azevedo; Cor Meenderinck; Ben H. H. Juurlink; Mauricio Alvarez 001; Alex Ramírez (ISCAS, 2008)

Parallel H.264 Decoding on an Embedded Multicore Processor. - Arnaldo Azevedo; Cor Meenderinck; Ben H. H. Juurlink; Andrei Sergeevich Terechko; Jan Hoogerbrugge; Mauricio Alvarez 001; Alex Ramírez (HiPEAC, 2009)

Scalability of Macroblock-level Parallelism for H.264 Decoding. - Mauricio Alvarez-Mesa; Alex Ramírez; Arnaldo Azevedo; Cor Meenderinck; Ben H. H. Juurlink; Mateo Valero (ICPADS, 2009)

Evaluación del rendimiento paralelo en el nivel macro bloque del decodificador H.264 en una arquitectura multiprocesador cc-NUMA. - Mauricio Alvarez 001; Alex Ramírez; Mateo Valero; Arnaldo Azevedo; Cor Meenderinck (Rev. Avances en Sistemas Informática, 2009)

Parallel Scalability of Video Decoders. - Cor Meenderinck; Arnaldo Azevedo; Ben H. H. Juurlink; Mauricio Alvarez 001; Alex Ramírez (J. Signal Process. Syst., 2009)

The SARC Architecture. - Alex Ramírez; Felipe Cabarcas; Ben H. H. Juurlink; Mauricio Alvarez-Mesa; Friman Sánchez; Arnaldo Azevedo; Cor Meenderinck; Catalin Bogdan Ciobanu; Sebastián Isaza; Georgi Gaydadjiev (IEEE Micro, 2010)

A Highly Scalable Parallel Implementation of H.264. - Arnaldo Azevedo; Ben H. H. Juurlink; Cor Meenderinck; Andrei Sergeevich Terechko; Jan Hoogerbrugge; Mauricio Alvarez 001; Alex Ramírez; Mateo Valero (Trans. High Perform. Embed. Archit. Compil., 2011)

Parallel video decoding. - Mauricio Alvarez-Mesa (2011)

An Optimized Parallel IDCT on Graphics Processing Units. - Biao Wang 001; Mauricio Alvarez-Mesa; Chi Ching Chi; Ben H. H. Juurlink (Euro-Par Workshops, 2012)

Parallel video decoding in the emerging HEVC standard. - Mauricio Alvarez-Mesa; Chi Ching Chi; Ben H. H. Juurlink; Valeri George; Thomas Schierl (ICASSP, 2012)

Improving the parallelization efficiency of HEVC decoding. - Chi Ching Chi; Mauricio Alvarez-Mesa; Ben H. H. Juurlink; Valeri George; Thomas Schierl (ICIP, 2012)

Parallel Scalability and Efficiency of HEVC Parallelization Approaches. - Chi Ching Chi; Mauricio Alvarez-Mesa; Ben H. H. Juurlink; Gordon Clare; Félix Henry; Stéphane Pateux; Thomas Schierl (IEEE Trans. Circuits Syst. Video Technol., 2012)

Scalable Parallel Programming Applied to H.264/AVC Decoding. - Ben H. H. Juurlink; Mauricio Alvarez-Mesa; Chi Ching Chi; Arnaldo Azevedo; Cor Meenderinck; Alex Ramírez (Springer, 2012)

HEVC performance and complexity for 4K video. - Benjamin Bross; Valeri George; Mauricio Alvarez-Mesa; Tobias Mayer 001; Chi Ching Chi; Jens Brandenburg; Thomas Schierl; Detlev Marpe; Ben H. H. Juurlink (ICCE-Berlin, 2013)

A low-complexity parallel-friendly rate control algorithm for ultra-low delay high definition video coding. - Sergio Sanz Rodríguez; Tobias Mayer 001; Mauricio Alvarez-Mesa; Thomas Schierl (ICME Workshops, 2013)

How a single chip causes massive power bills GPUSimPow: A GPGPU power simulator. - Jan Lucas; Sohan Lal; Michael Andersch; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (ISPASS, 2013)

Parallel HEVC Decoding on Multi- and Many-core Architectures - A Power and Performance Analysis. - Chi Ching Chi; Mauricio Alvarez-Mesa; Jan Lucas; Ben H. H. Juurlink; Thomas Schierl (J. Signal Process. Syst., 2013)

GPGPU workload characteristics and performance analysis. - Sohan Lal; Jan Lucas; Michael Andersch; Mauricio Alvarez-Mesa; Ahmed Elhossini; Ben H. H. Juurlink (ICSAMOS, 2014)

Low-Power High-Efficiency Video Decoding using General-Purpose Processors. - Chi Ching Chi; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (ACM Trans. Archit. Code Optim., 2014)

Multi/many-core programming: where are we standing? - Jerónimo Castrillón; Lothar Thiele; Lars Schor; Weihua Sheng; Ben H. H. Juurlink; Mauricio Alvarez-Mesa; Angela Pohl; Ralph Jessenberger; Victor Reyes; Rainer Leupers (DATE, 2015)

High Performance Memory Accesses on FPGA-SoCs: A Quantitative Analysis. - Matthias Göbel 001; Chi Ching Chi; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (FCCM, 2015)

Optimizing HEVC CABAC Decoding with a Context Model Cache and Application-Specific Prefetching. - Philipp Habermann; Chi Ching Chi; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (ISM, 2015)

On latency in GPU throughput microarchitectures. - Michael Andersch; Jan Lucas; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (ISPASS, 2015)

Reducing HEVC encoding complexity using two-stage motion estimation. - Gabriel Cebrián-Márquez; Chi Ching Chi; José Luis Martínez 001; Pedro Cuenca 001; Mauricio Alvarez-Mesa; Sergio Sanz Rodríguez; Ben H. H. Juurlink (VCIP, 2015)

A parallel H.264/SVC encoder for high definition video conferencing. - Sergio Sanz Rodríguez; Mauricio Alvarez-Mesa; Tobias Mayer 001; Thomas Schierl (Signal Process. Image Commun., 2015)

Spatiotemporal SIMT and Scalarization for Improving GPU Efficiency. - Jan Lucas; Michael Andersch; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (ACM Trans. Archit. Code Optim., 2015)

SIMD Acceleration for HEVC Decoding. - Chi Ching Chi; Mauricio Alvarez-Mesa; Benjamin Bross; Ben H. H. Juurlink; Thomas Schierl (IEEE Trans. Circuits Syst. Video Technol., 2015)

Parallel H.264/AVC Motion Compensation for GPUs Using OpenCL. - Biao Wang 001; Mauricio Alvarez-Mesa; Chi Ching Chi; Ben H. H. Juurlink (IEEE Trans. Circuits Syst. Video Technol., 2015)

Efficient HEVC decoder for heterogeneous CPU with GPU systems. - Biao Wang 001; Mauricio Alvarez-Mesa; Chi Ching Chi; Ben H. H. Juurlink; Diego F. de Souza; Aleksandar Ilic; Nuno Roma; Leonel Sousa (MMSP, 2016)

An evaluation of current SIMD programming models for C++. - Angela Pohl; Biagio Cosenza; Mauricio Alvarez-Mesa; Chi Ching Chi; Ben H. H. Juurlink (WPMVP@PPoPP, 2016)

A Quantitative Analysis of the Memory Architecture of FPGA-SoCs. - Matthias Göbel 001; Ahmed Elhossini; Chi Ching Chi; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (ARC, 2017)

Syntax Element Partitioning for high-throughput HEVC CABAC decoding. - Philipp Habermann; Chi Ching Chi; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (ICASSP, 2017)

Application-Specific Cache and Prefetching for HEVC CABAC Decoding. - Philipp Habermann; Chi Ching Chi; Mauricio Alvarez-Mesa; Bernardus Juurlink (IEEE Multim., 2017)

GPU Parallelization of HEVC In-Loop Filters. - Biao Wang 001; Diego F. de Souza; Mauricio Alvarez-Mesa; Chi Ching Chi; Ben H. H. Juurlink; Aleksandar Ilic; Nuno Roma; Leonel Sousa (Int. J. Parallel Program., 2017)

PSNC advanced multimedia and visualization infrastructures, services and applications. - Krzysztof Kurowski; Maciej Glowiak; Bogdan Ludwiczak; Maciej Strozyk; Milosz Ciznicki; Artur Binczewski; Mauricio Alvarez-Mesa (Web3D, 2018)

Highly parallel HEVC decoding for heterogeneous systems with CPU and GPU. - Biao Wang 001; Diego F. de Souza; Mauricio Alvarez-Mesa; Chi Ching Chi; Ben H. H. Juurlink; Aleksandar Ilic; Nuno Roma; Leonel Sousa (Signal Process. Image Commun., 2018)

A Bin-Based Bitstream Partitioning Approach for Parallel CABAC Decoding in Next Generation Video Coding. - Philipp Habermann; Chi Ching Chi; Mauricio Alvarez-Mesa; Ben H. H. Juurlink (IPDPS, 2019)

Efficient Wavefront Parallel Processing for HEVC CABAC Decoding. - Philipp Habermann; Bernardus Juurlink; C. C. Chi; Mauricio Alvarez-Mesa (PDP, 2020)