An Experimental VLSI Prolog Interpreter: Preliminary Measurements and Results. - Pierluigi Civera; Franco Maddaleno; Gianluca Piccinini; Maurizio Zamboni (ISCA, 1987)

Design considerations on a VLSI Prolog interpreter. - Pierluigi Civera; Gianluca Piccinini; Maurizio Zamboni (Microprocess. Microprogramming, 1987)

Implementation studies for a VLSI Prolog coprocessor. - Pierluigi Civera; Gianluca Piccinini; Maurizio Zamboni (IEEE Micro, 1989)

Deflection network: Principles, implementation, services. - Guido Albertengo; Pierluigi Civera; Renato Lo Cigno; Gianluca Piccinini; Maurizio Zamboni; Flaminio Borgonovo; Luigi Fratta; Giuseppe Panizzardi (Eur. Trans. Telecommun., 1992)

PROXIMA: PROlog eXecutIon MAchine. - Livio Baldi; Pierluigi Civera; Angela Iurlaro; Guido Masera; Andrea Pagni; Gianluca Piccinini; Rinaldo Poluzzi; Massimo Ruo Roch; Maurizio Zamboni (IEEE J. Solid State Circuits, 1993)

Input and output processor for an ATM high speed switch (2.5 Gb/s): the CMC. - Pierre Plaza; Juan Carlos Diaz; Fermín Calvo; Luis A. Merayo; Maurizio Zamboni; Pietro Scarfone; Marco Barbini (ED&TC, 1995)

A 650 MHz pipelined MAC for DSP applications using a new clocking strategy. - F. Fraternali; Guido Masera; Gianluca Piccinini; Maurizio Zamboni (EUSIPCO, 1996)

A comprehensive submicrometer MOST delay model and its application to CMOS buffers. - Pasquale Cocchini; Gianluca Piccinini; Maurizio Zamboni (IEEE J. Solid State Circuits, 1997)

A 500 MHz 2d-DWT VLSI processor. - A. Brizio; Guido Masera; Gianluca Piccinini; Massimo Ruo Roch; Maurizio Zamboni (EUSIPCO, 1998)

A receiver architecture conforming to the OFDM based digital video broadcasting standard for terrestrial transmission (DVB-T). - Pierre Combelles; Christophe Del Toso; Dietmar Hepper; David Le Goff; J. J. Ma; Patrick Robertson; Fabio Scalise; Laurent Soyer; Maurizio Zamboni (ICC, 1998)

Fanout optimization under a submicron transistor-level delay model. - Pasquale Cocchini; Massoud Pedram; Gianluca Piccinini; Maurizio Zamboni (ICCAD, 1998)

A Quantitative Approach to the Design of an Optimized Hardware Interpreter for Java Byte-Code. - Guido Masera; Gianluca Piccinini; Massimo Ruo Roch; Maurizio Zamboni (Applied Informatics, 1999)

New 2 Gbit/s CMOS I/O pads. - Guido Masera; Gianluca Piccinini; Massimo Ruo Roch; Maurizio Zamboni (Great Lakes Symposium on VLSI, 1999)

A global optimization tool for CMOS logic circuits. - Marco Delaurenti; Mariagrazia Graziano; Guido Masera; Gianluca Piccinini; Maurizio Zamboni (ICECS, 1999)

VLSI architectures for turbo codes. - Guido Masera; Gianluca Piccinini; Massimo Ruo Roch; Maurizio Zamboni (IEEE Trans. Very Large Scale Integr. Syst., 1999)

A 50 Mbit/s Iterative Turbo-Decoder. - Fabrizio Viglione; Guido Masera; Gianluca Piccinini; Massimo Ruo Roch; Maurizio Zamboni (DATE, 2000)

A high accuracy-low complexity model for CMOS delays. - Mario Roberto Casu; Guido Masera; Gianluca Piccinini; Massimo Ruo Roch; Maurizio Zamboni (ISCAS, 2000)

Noise Safety Design Methodologies. - Mariagrazia Graziano; Marco Delaurenti; Guido Masera; Gianluca Piccinini; Maurizio Zamboni (ISQED, 2000)

Power supply design parameters prediction for high performance IC design flows. - Mariagrazia Graziano; Marco Delaurenti; Maurizio Zamboni (SLIP, 2000)

JPEG 2000: finite precision representation and hardware implications. - Maurizio Martina; Guido Masera; Gianluca Piccinini; Fabrizio Vacca; Maurizio Zamboni (ICECS, 2001)

Reconfigurable coprocessor based JPEG 2000 implementation. - Maurizio Martina; Guido Masera; Gianluca Piccinini; Fabrizio Vacca; Maurizio Zamboni (ICECS, 2001)

Synthesis of low-leakage PD-SOI circuits with body-biasing. - Mario R. Casu; Gianluca Piccinini; Guido Masera; Maurizio Zamboni (ISLPED, 2001)

Hierarchical power supply noise evaluation for early power grid design prediction. - Mariagrazia Graziano; Guido Masera; Gianluca Piccinini; Maurizio Zamboni (SLIP, 2001)

Switching Noise Analysis Framework For High Speed Logic Families. - Marco Delaurenti; Mariagrazia Graziano; Guido Masera; Gianluca Piccinini; Maurizio Zamboni (VLSI Design, 2001)

Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor. - Maurizio Martina; Guido Masera; Gianluca Piccinini; Fabrizio Vacca; Maurizio Zamboni (FPL, 2002)

Reconfigurable DSP IP for multimedia applications. - Maurizio Martina; Guido Masera; Gianluca Piccinini; Fabrizio Vacca; Maurizio Zamboni (ICASSP, 2002)

System architecture for error-resilient, embedded JPEG2000 wireless delivery. - Maurizio Martina; Guido Masera; Gianluca Piccinini; Fabrizio Vacca; Maurizio Zamboni (DSP, 2002)

Embedded IWT evaluation in reconfigurable wireless sensor network. - Maurizio Martina; Guido Masera; Gianluca Piccinini; Fabrizio Vacca; Maurizio Zamboni (ICECS, 2002)

Clock Distribution Network Optimization under Self-Heating and Timing Constraints. - Mario R. Casu; Mariagrazia Graziano; Guido Masera; Gianluca Piccinini; M. M. Prono; Maurizio Zamboni (PATMOS, 2002)

Architectural strategies for low-power VLSI turbo decoders. - Guido Masera; Marco Mazza; Gianluca Piccinini; Fabrizio Viglione; Maurizio Zamboni (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding. - Federico Quaglio; Maurizio Martina; Fabrizio Vacca; Guido Masera; Andrea Molino; Gianluca Piccinini; Maurizio Zamboni (FPGA, 2003)

A Block-Based Approach for SoC Global Interconnect Electrical Parameters Characterization. - M. Addino; Mario R. Casu; Guido Masera; Gianluca Piccinini; Maurizio Zamboni (PATMOS, 2003)

Effects of Temperature in Deep-Submicron Global Interconnect Optimization. - Mario R. Casu; Mariagrazia Graziano; Gianluca Piccinini; Guido Masera; Maurizio Zamboni (PATMOS, 2003)

Coupled electro-thermal modeling and optimization of clock networks. - Mario R. Casu; Mariagrazia Graziano; Guido Masera; Gianluca Piccinini; Maurizio Zamboni (Microelectron. J., 2003)

Novel JPEG 2000 Compliant DWT and IWT VLSI Implementations. - Maurizio Martina; Guido Masera; Gianluca Piccinini; Maurizio Zamboni (J. VLSI Signal Process., 2003)

Effects of temperature in deep-submicron global interconnect optimization in future technology nodes. - Mariagrazia Graziano; Mario R. Casu; Guido Masera; Gianluca Piccinini; Maurizio Zamboni (Microelectron. J., 2004)

An electromigration and thermal model of power wires for a priori high-level reliability prediction. - Mario R. Casu; Mariagrazia Graziano; Guido Masera; Gianluca Piccinini; Maurizio Zamboni (IEEE Trans. Very Large Scale Integr. Syst., 2004)

An effective AMS top-down methodology applied to the design of a mixed-signal UWB system-on-chip. - Marco Crepaldi; Mario R. Casu; Mariagrazia Graziano; Maurizio Zamboni (DATE, 2007)

The NoCRay Graphic Accelerator: a Case-study for MP-SoC Network-on-Chip Design Methodology. - Sergio Tota; Mario R. Casu; Paolo Motto Ros; Massimo Ruo Roch; Maurizio Zamboni (SoC, 2007)

A methodology and a case-study for network-on-chip based MP-SoC architectures. - Sergio Tota; Mario R. Casu; Paolo Motto Ros; Massimo Ruo Roch; Maurizio Zamboni (Nano-Net, 2007)

A Fully Differential Digital CMOS UWB Pulse Generator. - Mario R. Casu; Mariagrazia Graziano; Maurizio Zamboni (Circuits Syst. Signal Process., 2009)

A mixed-signal demodulator for a low-complexity IR-UWB receiver: Methodology, simulation and design. - Marco Crepaldi; Mario R. Casu; Mariagrazia Graziano; Maurizio Zamboni (Integr., 2009)

A Case Study for NoC-Based Homogeneous MPSoC Architectures. - Sergio Tota; Mario R. Casu; Massimo Ruo Roch; Luca Macchiarulo; Maurizio Zamboni (IEEE Trans. Very Large Scale Integr. Syst., 2009)

MEDEA: a hybrid shared-memory/message-passing multiprocessor NoC-based architecture. - Sergio Tota; Mario R. Casu; Massimo Ruo Roch; Luca Rostagno; Maurizio Zamboni (DATE, 2010)

A flexible simulation methodology and tool for nanoarray-based architectures. - Stefano Frache; Mariagrazia Graziano; Maurizio Zamboni (ICCD, 2010)

Nanofabric power analysis: Biosequence alignment case study. - Stefano Frache; Luca Gaetano Amarù; Mariagrazia Graziano; Maurizio Zamboni (NANOARCH, 2011)

Asynchrony in Quantum-Dot Cellular Automata Nanocomputation: Elixir or Poison? - Mariagrazia Graziano; Marco Vacca; Davide Blua; Maurizio Zamboni (IEEE Des. Test Comput., 2011)

Asynchronous Solutions for Nanomagnetic Logic Circuits. - Marco Vacca; Mariagrazia Graziano; Maurizio Zamboni (ACM J. Emerg. Technol. Comput. Syst., 2011)

A NoC-based hybrid message-passing/shared-memory approach to CMP design. - Mario R. Casu; Massimo Ruo Roch; Sergio Tota; Maurizio Zamboni (Microprocess. Microsystems, 2011)

DVFS Based on Voltage Dithering and Clock Scheduling for GALS Systems. - Manoj Kumar Yadav; Mario R. Casu; Maurizio Zamboni (ASYNC, 2012)

Protein alignment HW/SW optimizations. - Gianvito Urgese; Mariagrazia Graziano; Marco Vacca; Muhammad Awais 004; Stefano Frache; Maurizio Zamboni (ICECS, 2012)

ToPoliNano: nanoarchitectures design made real. - Stefano Frache; Diego Chiabrando; Mariagrazia Graziano; Fabrizio Riente; Giovanna Turvani; Maurizio Zamboni (NANOARCH, 2012)

Breast cancer detection based on an UWB imaging system: Receiver design and simulations. - Xiaolu Guo; Mario R. Casu; Mariagrazia Graziano; Maurizio Zamboni (ICICDT, 2013)

Biosequences analysis on NanoMagnet Logic. - Juanchi Wang; Marco Vacca; Mariagrazia Graziano; Massimo Ruo Roch; Maurizio Zamboni (ICICDT, 2013)

On the functional test of the BTB logic in pipelined and superscalar processors. - D. Changdao; Mariagrazia Graziano; Ernesto Sánchez 001; Matteo Sonza Reorda; Maurizio Zamboni; N. Zhifan (LATW, 2013)

Automatic Place&Route of Nano-magnetic Logic circuits. - Marco Vacca; Stefano Frache; Mariagrazia Graziano; L. Di Crescenzo; Fabrizio Cairo; Maurizio Zamboni (NANOARCH, 2013)

UWB receiver for breast cancer detection: Comparison between two different approaches. - Xiaolu Guo; Mario R. Casu; Mariagrazia Graziano; Maurizio Zamboni (SoCC, 2013)

A Hardware Viewpoint on Biosequence Analysis: What's Next? - Mariagrazia Graziano; Stefano Frache; Maurizio Zamboni (ACM J. Emerg. Technol. Comput. Syst., 2013)

LAURA-NoC: Local Automatic Rate Adjustment in Network-on-Chips With a Simple DVFS. - Manoj Kumar Yadav; Mario R. Casu; Maurizio Zamboni (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

Nanomagnetic Logic Microprocessor: Hierarchical Power Model. - Marco Vacca; Mariagrazia Graziano; Maurizio Zamboni (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Hardware Acceleration of Beamforming in a UWB Imaging Unit for Breast Cancer Detection. - Francesco Colonna; Mariagrazia Graziano; Mario Roberto Casu; Xiaolu Guo; Maurizio Zamboni (VLSI Design, 2013)

Physical design and testing of Nano Magnetic architectures. - Giovanna Turvani; A. Tohti; Matteo Bollo; Fabrizio Riente; Marco Vacca; Mariagrazia Graziano; Maurizio Zamboni (DTIS, 2014)

Dynamic Gap Selector: A Smith Waterman Sequence Alignment Algorithm with Affine Gap Model Optimization. - Gianvito Urgese; Giulia Paciello; Andrea Acquaviva; Elisa Ficarra; Mariagrazia Graziano; Maurizio Zamboni (IWBBIO, 2014)

A standard cell approach for MagnetoElastic NML circuits. - Davide Giri; Marco Vacca; Giovanni Causapruno; Wenjing Rao; Mariagrazia Graziano; Maurizio Zamboni (NANOARCH, 2014)

Fault tolerant nanoarray circuits: Automatic design and verification. - Pasquale Ranone; Giovanna Turvani; Fabrizio Riente; Mariagrazia Graziano; Massimo Ruo Roch; Maurizio Zamboni (VTS, 2014)

A Joint Source/Channel Approach to Strengthen Embedded Programmable Devices against Flash Memory Errors. - Maurizio Martina; Carlo Condo; Guido Masera; Maurizio Zamboni (IEEE Embed. Syst. Lett., 2014)

Simulation and design of an UWB imaging system for breast cancer detection. - Xiaolu Guo; Mario R. Casu; Mariagrazia Graziano; Maurizio Zamboni (Integr., 2014)

Nanoarray architectures multilevel simulation. - Stefano Frache; Mariagrazia Graziano; Maurizio Zamboni (ACM J. Emerg. Technol. Comput. Syst., 2014)

Enabling design and simulation of massive parallel nanoarchitectures. - Stefano Frache; Diego Chiabrando; Mariagrazia Graziano; Marco Vacca; Luca Boarino; Maurizio Zamboni (J. Parallel Distributed Comput., 2014)

UWB microwave imaging for breast cancer detection: Many-core, GPU, or FPGA? - Mario R. Casu; Francesco Colonna; Marco Crepaldi; Danilo Demarchi; Mariagrazia Graziano; Maurizio Zamboni (ACM Trans. Embed. Comput. Syst., 2014)

ToPoliNano: NanoMagnet Logic Circuits Design and Simulation. - Marco Vacca; Stefano Frache; Mariagrazia Graziano; Fabrizio Riente; Giovanna Turvani; Massimo Ruo Roch; Maurizio Zamboni (Field-Coupled Nanocomputing, 2014)

Electric Clock for NanoMagnet Logic Circuits. - Marco Vacca; Mariagrazia Graziano; Alessandro Chiolerio; Andrea Lamberti; Marco Laurenti; Davide Balma; Emanuele Enrico; Federica Celegato; Paola Tiberto; Luca Boarino; Maurizio Zamboni (Field-Coupled Nanocomputing, 2014)

NanoMagnet Logic: An Architectural Level Overview. - Marco Vacca; Mariagrazia Graziano; Juanchi Wang; Fabrizio Cairo; Giovanni Causapruno; Gianvito Urgese; Andrea Biroli; Maurizio Zamboni (Field-Coupled Nanocomputing, 2014)

Logic-in-Memory architecture made real. - D. Pala; Giovanni Causapruno; Marco Vacca; Fabrizio Riente; Giovanna Turvani; Mariagrazia Graziano; Maurizio Zamboni (ISCAS, 2015)

Logic-in-Memory: A Nano Magnet Logic Implementation. - Mario Cofano; Giulia Santoro; Marco Vacca; D. Pala; Giovanni Causapruno; Fabrizio Cairo; Fabrizio Riente; Giovanna Turvani; Massimo Ruo Roch; Mariagrazia Graziano; Maurizio Zamboni (ISVLSI, 2015)

Interleaving in Systolic-Arrays: A Throughput Breakthrough. - Giovanni Causapruno; Marco Vacca; Mariagrazia Graziano; Maurizio Zamboni (IEEE Trans. Computers, 2015)

Protein Alignment Systolic Array Throughput Optimization. - Giovanni Causapruno; Gianvito Urgese; Marco Vacca; Mariagrazia Graziano; Maurizio Zamboni (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Feedbacks in QCA: A Quantitative Approach. - Marco Vacca; Juanchi Wang; Mariagrazia Graziano; Massimo Ruo Roch; Maurizio Zamboni (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A Reconfigurable Array Architecture for NML. - Giovanni Causapruno; Umberto Garlando; Fabrizio Cairo; Maurizio Zamboni; Mariagrazia Graziano (ISVLSI, 2016)

Reconfigurable Systolic Array: From Architecture to Physical Design for NML. - Giovanni Causapruno; Fabrizio Riente; Giovanna Turvani; Marco Vacca; Massimo Ruo Roch; Maurizio Zamboni; Mariagrazia Graziano (IEEE Trans. Very Large Scale Integr. Syst., 2016)

NANOcom: A Mosaic Approach for nanoelectronic circuits design. - Matteo Bollo; Giulia Santoro; Umberto Garlando; Maurizio Zamboni (DTIS, 2017)

Efficient and reliable fault analysis methodology for nanomagnetic circuits. - Giovanna Turvani; Fabrizio Riente; Fabrizio Cairo; Marco Vacca; Umberto Garlando; Maurizio Zamboni; Mariagrazia Graziano (Int. J. Circuit Theory Appl., 2017)

ToPoliNano: A CAD Tool for Nano Magnetic Logic. - Fabrizio Riente; Giovanna Turvani; Marco Vacca; Massimo Ruo Roch; Maurizio Zamboni; Mariagrazia Graziano (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Domain Wall Interconnections for NML. - Fabrizio Cairo; Marco Vacca; Giovanna Turvani; Maurizio Zamboni; Mariagrazia Graziano (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Exploration of multilayer field-coupled nanomagnetic circuits. - Giulia Santoro; Marco Vacca; Matteo Bollo; Fabrizio Riente; Mariagrazia Graziano; Maurizio Zamboni (Microelectron. J., 2018)

Bitmap Index: A Processing-in-Memory Reconfigurable Implementation. - Milena Andrighetti; Giovanna Turvani; Giulia Santoro; Marco Vacca; Massimo Ruo Roch; Maurizio Graziano; Maurizio Zamboni (ApplePies, 2019)

WINNER: a high speed high energy efficient Neural Network implementation for image classification. - Simone Domenico Antonietta; Andrea Coluccio; Giovanna Turvani; Marco Vacca; Mariagrazia Graziano; Maurizio Zamboni (ICECS, 2019)

Data Processing and Information Classification - An In-Memory Approach. - Milena Andrighetti; Giovanna Turvani; Giulia Santoro; Marco Vacca; Andrea Marchesin; Fabrizio Ottati; Massimo Ruo Roch; Mariagrazia Graziano; Maurizio Zamboni (Sensors, 2020)

Octantis: An Exploration Tool for Beyond von Neumann architectures. - Andrea Marchesin; Giovanna Turvani; Andrea Coluccio; Fabrizio Riente; Marco Vacca; Massimo Ruo Roch; Mariagrazia Graziano; Maurizio Zamboni (DTIS, 2021)

Engineering Grover Adaptive Search: Exploring the Degrees of Freedom for Efficient QUBO Solving. - Luigi Giuffrida; Deborah Volpe; Giovanni Amedeo Cirillo; Maurizio Zamboni; Giovanna Turvani (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

Towards Compact Modeling of Noisy Quantum Computers: A Molecular-Spin-Qubit Case of Study. - Mario Simoni; Giovanni Amedeo Cirillo; Giovanna Turvani; Mariagrazia Graziano; Maurizio Zamboni (ACM J. Emerg. Technol. Comput. Syst., 2022)

Hybrid-SIMD: A Modular and Reconfigurable Approach to Beyond von Neumann Computing. - Andrea Coluccio; Umberto Casale; Angela Guastamacchia; Giovanna Turvani; Marco Vacca; Massimo Ruo Roch; Maurizio Zamboni; Mariagrazia Graziano (IEEE Trans. Computers, 2022)

Integration of Simulated Quantum Annealing in Parallel Tempering and Population Annealing for Heterogeneous-Profile QUBO Exploration. - Deborah Volpe; Giovanni Amedeo Cirillo; Maurizio Zamboni; Giovanna Turvani (IEEE Access, 2023)

Towards Quantum Circuit Emulation on Low-Tier FPGAs. - Christian Conti; Deborah Volpe; Giovanni Amedeo Cirillo; Mariagrazia Graziano; Maurizio Zamboni; Giovanna Turvani (QCE, 2024)

AMARETTO: Enabling Efficient Quantum Algorithm Emulation on Low-Tier FPGAs. - Christian Conti; Deborah Volpe; Mariagrazia Graziano; Maurizio Zamboni; Giovanna Turvani (CoRR, 2024)

Mage: a Decoupled Access-Execute CGRA tailored for Static Control Applications. - Alessio Naclerio; Fabrizio Riente; Giovanna Turvani; Marco Vacca; Maurizio Zamboni; Mariagrazia Graziano (ISCAS, 2025)

Optimizing TCN Inference: A Hardware-Software Co-Design Approach with CGRA Acceleration. - Alessandro Varaldi; Alessio Naclerio; Fabrizio Riente; Maurizio Zamboni; Mariagrazia Graziano; Marco Vacca (ISVLSI, 2025)

DExIMA: Design Explorer for In-Memory Architectures. - Andrea Coluccio; Alessio Naclerio; Marco Vacca; Giovanna Turvani; Mariagrazia Graziano; Maurizio Zamboni (IEEE Access, 2025)

AEQUAM: Accelerating Quantum Algorithm Validation Through FPGA-Based Emulation. - Lorenzo Lagostina; Deborah Volpe; Maurizio Zamboni; Giovanna Turvani (IEEE Access, 2025)

Evaluating Angle and Amplitude Encoding Strategies for Variational Quantum Machine Learning: their impact on model's accuracy. - Antonio Tudisco; Andrea Marchesin; Maurizio Zamboni; Mariagrazia Graziano; Giovanna Turvani (CoRR, 2025)