Laser integration with CMOS assembly process for Si photonics. - Ricky Tseng; James O'Callaghan; Feras Eid; Michael Gleeson; Brandon Rawlings; Mauro J. Kobrinsky; Ibrahim Ban; Roger Nagle; William McFarlane; Brian Corbett; Peter Chang (OFC, 2014)

Wafer-level electromigration for reliability monitoring: Quick-turn electromigration stress with correlation to package-level stress. - D. Slottke; R. J. Kamaladasa; M. Harmes; Ilan Tsameret; Mauro J. Kobrinsky; Timothy McMullen; John Dunklee (IRPS, 2015)

Back End Of Line opportunities and reliability challenges for future technology nodes. - Mauro J. Kobrinsky; Rahim Kasim (IRPS, 2021)

Novel Cell Architectures with Back-side Transistor Contacts for Scaling and Performance. - Mauro J. Kobrinsky; J. D. Silva; E. Mannebach; S. Mills; M. Abd El Qader; O. Adebayo; N. Arkali Radhakrishna; M. Beasley; J. Chawla; S. Chugh; A. Dasgupta; U. Desai; et al. (VLSI Technology and Circuits, 2023)

2D Materials in the BEOL. - C. H. Naylor; Kirby Maxey; C. Jezewski; K. P. O'Brien; A. V. Penumatcha; M. S. Kavrik; B. Agrawal; C. V. Littlefield; J. Lux; B. Barley; Justin R. Weber; A. Sen Gupta; et al. (VLSI Technology and Circuits, 2023)