Parallel implementation of exact dilations and multi-scale skeletonization. - Maximiliam Luppe; Luciano da Fontoura Costa; Valentin Obac Roda (Real Time Imaging, 2003)

Architecture for fractal dimension estimation based on Minkowski-Bouligand method using integer distances. - Isabela Rossales; Maximiliam Luppe (ASAP, 2016)

Design of a low power 10-bit 12MS/s asynchronous SAR ADC in 65nm CMOS. - Arthur Lombardi Campos; João Navarro 001; Maximiliam Luppe (SBCCI, 2019)

FPGA Implementation of a Pseudorandom Number Generator Based on k - Logistic Map. - Matheus M. de A. Kotaki; Maximiliam Luppe (LASCAS, 2020)

Performance Comparison of High-Speed Dual Modulus Prescalers Using Metaheuristic Sizing/Optimization. - João Navarro 001; Maximiliam Luppe (SBCCI, 2020)

Low-Latency Reconfigurable Entropy Digital True Random Number Generator With Bias Detection and Correction. - Leonardo Bosco Carreira; Paige Danielson; Arya A. Rahimi; Maximiliam Luppe; Subhanshu Gupta (IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020)

Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation. - Tiago Mateus Nordi; V. M. Barbosa; R. H. Gounella; Godfred Asan; Maximiliam Luppe; João Navarro Soares Junior; João Paulo Carmo; Erich Talamoni Fonoff; Eduardo Colombari (DCIS, 2021)

Custom ASIC Design for SHA-256 Using Open-Source Tools. - Lucas Daudt Franck; Gabriel Augusto Ginja; João Paulo Carmo; José A. Afonso 001; Maximiliam Luppe (Comput., 2024)

Development of Optrodes and Instrumentation for Wireless Optogenetic Application. - Helder Eiki Oshiro; Rodrigo de A. P. Andrade; João Navarro Soares Junior; Maximiliam Luppe; Eduardo Colombari; M. Celeste Dias; João Paulo Carmo (BIOSTEC (1), 2025)

A Low-Noise Amplifier in Submicron CMOS for Neural Recording on Optogenetics Applications. - Helder Eiki Oshiro; Rodrigo de A. P. Andrade; João Navarro Soares Junior; Maximiliam Luppe; Eduardo Colombari; M. Celeste Dias; João Paulo Carmo (BIOSTEC (1), 2025)