Architecture of a real-time delay calculator for digital beamforming in ultrasound system. - Mayur Agarwal; Arijit De; Swapna Banerjee (IET Circuits Devices Syst., 2016)

An IEEE Single Precision Floating Point Arithmetic-Based Apodization Architecture for Portable Ultrasound Imaging System. - Mayur Agarwal; Arijit De; Swapna Banerjee (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

High-Speed Hybrid-Logic Full Adder Using High-Performance 10-T XOR-XNOR Cell. - Jyoti Kandpal; Abhishek Tomar; Mayur Agarwal; Kamal Kumar Sharma (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Design and implementation of 20-T hybrid full adder for high-performance arithmetic applications. - Jyoti Kandpal; Abhishek Tomar; Mayur Agarwal (Microelectron. J., 2021)