Sneak path enabled authentication for memristive crossbar memories. - Md. Badruddoja Majumder; Mesbah Uddin; Garrett S. Rose; Jeyavijayan Rajendran (AsianHOST, 2016)

A Designer's Rationale for Nanoelectronic Hardware Security Primitives. - Garrett S. Rose; Mesbah Uddin; Md. Badruddoja Majumder (ISVLSI, 2016)

Techniques for Improved Reliability in Memristive Crossbar PUF Circuits. - Mesbah Uddin; Md. Badruddoja Majumder; Garrett S. Rose; Karsten Beckmann; Harika Manem; Zahiruddin Alamgir; Nathaniel C. Cady (ISVLSI, 2016)

Exploiting Memristive Crossbar Memories as Dual-Use Security Primitives in IoT Devices. - Garrett S. Rose; Md. Badruddoja Majumder; Mesbah Uddin (ISVLSI, 2017)

Chaos computing for mitigating side channel attack. - Md. Badruddoja Majumder; Md Sakib Hasan; Mesbah Uddin; Garrett S. Rose (HOST, 2018)

Design of a Reconfigurable Chaos Gate with Enhanced Functionality Space in 65nm CMOS. - Aysha S. Shanta; Md. Badruddoja Majumder; Md Sakib Hasan; Mesbah Uddin; Garrett S. Rose (MWSCAS, 2018)

Nanoelectronic Security Designs for Resource-Constrained Internet of Things Devices: Finding Security Solutions with Nanoelectronic Hardwares. - Mesbah Uddin; Md. Badruddoja Majumder; Garrett S. Rose (IEEE Consumer Electron. Mag., 2018)

Practical realisation of a return map immune Lorenz-based chaotic stream cipher in circuitry. - Daniel Brown; Ava Hedayatipour; Md. Badruddoja Majumder; Garrett S. Rose; Nicole McFarlane; Donatello Materassi (IET Comput. Digit. Tech., 2018)

Design Considerations for Memristive Crossbar Physical Unclonable Functions. - Mesbah Uddin; Md. Badruddoja Majumder; Karsten Beckmann; Harika Manem; Zahiruddin Alamgir; Nathaniel C. Cady; Garrett S. Rose (ACM J. Emerg. Technol. Comput. Syst., 2018)

Design for Eliminating Operation Specific Power Signatures from Digital Logic. - Md. Badruddoja Majumder; Md Sakib Hasan; Aysha S. Shanta; Mesbah Uddin; Garrett S. Rose (ACM Great Lakes Symposium on VLSI, 2019)

Memristor Crossbar PUF based Lightweight Hardware Security for IoT. - Mesbah Uddin; Aysha S. Shanta; Md. Badruddoja Majumder; Md Sakib Hasan; Garrett S. Rose (ICCE, 2019)

Design of a Lightweight Reconfigurable PRNG Using Three Transistor Chaotic Map. - Aysha S. Shanta; Md Sakib Hasan; Md. Badruddoja Majumder; Garrett S. Rose (MWSCAS, 2019)

A Secure Integrity Checking System for Nanoelectronic Resistive RAM. - Md. Badruddoja Majumder; Md Sakib Hasan; Mesbah Uddin; Garrett S. Rose (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A Secure Back-up and Restore for Resource-Constrained IoT based on Nanotechnology. - Mesbah Uddin; Md. Badruddoja Majumder; Md Sakib Hasan; Garrett S. Rose (CoRR, 2020)

A Chaos-Based Complex Micro-instruction Set for Mitigating Instruction Reverse Engineering. - Md Sakib Hasan; Md. Badruddoja Majumder; Aysha S. Shanta; Mesbah Uddin; Garrett S. Rose (J. Hardw. Syst. Secur., 2020)

Design of an Enhanced Reconfigurable Chaotic Oscillator using G4FET-NDR Based Discrete Map. - Md Sakib Hasan; Aysha S. Shanta; Partha Sarathi Paul 002; Maisha Sadia; Md. Badruddoja Majumder; Garrett S. Rose (CoRR, 2021)

Physically Unclonable and Reconfigurable Computing System (PURCS) for Hardware Security Applications. - Aysha S. Shanta; Md. Badruddoja Majumder; Md Sakib Hasan; Garrett S. Rose (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)