Low latency FPGA implementation of twisted Edward curve cryptography hardware accelerator over prime field. - Md Rownak Hossain; Md Sazedur Rahman; Kh Shahriya Zaman; Walid El Fezzani; Mohammad Arif Sobhan Bhuiyan; Chia Chao Kang; Jia Yew Teh; Mahdi H. Miraz (CoRR, 2025)