A new digital test approach for analog-to-digital converter testing. - Mehdi Ehsanian; Bozena Kaminska; Karim Arabi (VTS, 1996)

Test and validation of a non-deterministic system - True Random Number Generator. - Kapila Udawatta; Sergey Maidanov; Mehdi Ehsanian; Surya Musunuri (HLDVT, 2008)

Self-biased resistive-feedback current-reused CMOS UWB LNA with 1.7dB nf for IR-UWB applications. - Reza Erfani; Fatemeh Marefat; Mehdi Ehsanian (ICM, 2014)

Low-power burst-mode clock recovery circuit using analog phase interpolator. - Hadi Hayati; Mehdi Ehsanian (ICM, 2014)

A widebound low phase noise LC-VCO based PLL with automatic amplitude control. - Ahmad Amini Sohrabi; Mehdi Ehsanian (ICM, 2014)

Highly phase-linear self-biased CMOS IR-UWB LNA with Sub-ps group-delay variations. - Reza Erfani; Fatemeh Marefat; Mehdi Ehsanian (ICM, 2016)

An FPGA based DPLL with fuzzy logic controllable loop filters. - Mohieddin Moradi; Mehdi Ehsanian (ICM, 2017)

A linear high capture range CDR with adaptive loop bandwidth for SONET application. - Sajjad Sabbaghi Saber; Mehdi Ehsanian (ICM, 2017)

An Improved KFCM Clustering Method Used for Multiple Fault Diagnosis of Analog Circuits. - Masoumeh Khanlari; Mehdi Ehsanian (Circuits Syst. Signal Process., 2017)

Generalized Method for Extraction of Offset, Gain, and Timing Skew Errors in Time-Interleaved ADCs. - Sarkis Azizian; Mehdi Ehsanian (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Effective extraction method for triple errors in foreground calibration of TI-ADCs. - Sarkis Azizian; Mehdi Ehsanian (Int. J. Circuit Theory Appl., 2022)