Designing Parameterizable Hardware IPs in a Model-Based Design Environment for High-Level Synthesis. - Shahzad Ahmad Butt; Mehdi Roozmeh; Luciano Lavagno (ACM Trans. Embed. Comput. Syst., 2016)

Implementation of a performance optimized database join operation on FPGA-GPU platforms using OpenCL. - Mehdi Roozmeh; Luciano Lavagno (NORCAS, 2017)

Efficient FPGA Implementation of OpenCL High-Performance Computing Applications via High-Level Synthesis. - Fahad Bin Muslim; Liang Ma 003; Mehdi Roozmeh; Luciano Lavagno (IEEE Access, 2017)

Design space exploration of multi-core RTL via high level synthesis from OpenCL models. - Mehdi Roozmeh; Luciano Lavagno (Microprocess. Microsystems, 2018)

Workflow Generation with wfGenes. - Mehdi Roozmeh; Ivan Kondov (WORKS@SC, 2020)

Workflows Community Summit: Advancing the State-of-the-art of Scientific Workflows Management Systems Research and Development. - Rafael Ferreira da Silva; Henri Casanova; Kyle Chard; Tainã Coleman; Dan Laney; Dong H. Ahn; Shantenu Jha; Dorran Howell; Stian Soiland-Reyes; Ilkay Altintas; Douglas Thain; Rosa Filgueira; et al. (CoRR, 2021)

Automating and Scaling Task-Level Parallelism of Tightly Coupled Models via Code Generation. - Mehdi Roozmeh; Ivan Kondov (ICCS (4), 2022)