High-frequency phase-locked loops in monolithic bipolar technology. - Mehmet Soyuer; Robert G. Meyer (IEEE J. Solid State Circuits, 1989)

Frequency limitations of a conventional phase-frequency detector. - Mehmet Soyuer; Robert G. Meyer (IEEE J. Solid State Circuits, 1990)

Multigigahertz voltage-controlled oscillators in advanced silicon bipolar technology. - Mehmet Soyuer; James D. Warnock (IEEE J. Solid State Circuits, 1992)

A monolithic 2.3-Gb/s 100-mW clock and data recovery circuit in silicon bipolar technology. - Mehmet Soyuer (IEEE J. Solid State Circuits, 1993)

A 1.6-Gb/s CMOS Phase-Frequency Locked Loop for Timing Recovery. - Mehmet Soyuer; Herschel A. Ainspan; John F. Ewen (ISCAS, 1995)

CMOS circuits for Gb/s serial data communication. - John F. Ewen; Mehmet Soyuer; Albert X. Widmer; Kevin R. Wrenner; Benjamin D. Parker; Herschel A. Ainspan (IBM J. Res. Dev., 1995)

A 2.4-GHz silicon bipolar oscillator with integrated resonator. - Mehmet Soyuer; Keith A. Jenkins; Joachim N. Burghartz; Herschel A. Ainspan; Frank J. Canora; Slaila Ponnapalli; John F. Ewen; William E. Pence (IEEE J. Solid State Circuits, 1996)

A 3-V 4-GHz nMOS voltage-controlled oscillator with integrated resonator. - Mehmet Soyuer; Keith A. Jenkins; Joachim N. Burghartz; Michael D. Hulvey (IEEE J. Solid State Circuits, 1996)

Single-chip 4×500-MBd CMOS transceiver. - Albert X. Widmer; Kevin R. Wrenner; Herschel A. Ainspan; Ben Parker; Pierre Austruy; Bernard Brezzo; Anne-Marie Haen; John F. Ewen; Mehmet Soyuer; Alain Blanc; Jean-Claude Abbiate; Alina Deutsch; et al. (IEEE J. Solid State Circuits, 1996)

Integrated RF components in a SiGe bipolar technology. - Joachim N. Burghartz; Mehmet Soyuer; Keith A. Jenkins; Michael Kies; Margaret Dolan; Kenneth J. Stein; John Malinowski; David L. Harame (IEEE J. Solid State Circuits, 1997)

An 11 GHz 3-V SiGe voltage controlled oscillator with integrated resonator. - Mehmet Soyuer; Joachim N. Burghartz; Herschel A. Ainspan; Keith A. Jenkins; Peter Xiao; Arvin R. Shahani; Margaret S. Dolan; David L. Harame (IEEE J. Solid State Circuits, 1997)

RF circuit design aspects of spiral inductors on silicon. - Joachim N. Burghartz; Daniel C. Edelstein; Mehmet Soyuer; Herschel A. Ainspan; Keith A. Jenkins (IEEE J. Solid State Circuits, 1998)

A 5.2 GHz 3.3 V I/Q SiGe RF transceiver. - Jean-Olivier Plouchart; Herschel A. Ainspan; Mehmet Soyuer (CICC, 1999)

SiGe BiCMOS 3.3-V clock and data recovery circuits for 10-Gb/s serial transmission systems. - Mounir Meghelli; Benjamin D. Parker; Herschel A. Ainspan; Mehmet Soyuer (IEEE J. Solid State Circuits, 2000)

Low-power multi-GHz and multi-Gb/s SiGe BiCMOS circuits. - Mehmet Soyuer; Herschel A. Ainspan; Mounir Meghelli; Jean-Olivier Plouchart (Proc. IEEE, 2000)

Silicon-germanium BiCMOS technology and a CAD environment for 2-40 GHz VLSI mixed-signal ICs. - Seshadri Subbanna; Lawrence Larson; Greg G. Freeman; David Ahlgren; Kenneth J. Stein; Carl E. Dickey; James Mecke; A. Rincon; P. Bacon; Robert A. Groves; Mehmet Soyuer; David L. Harame; et al. (CICC, 2001)

A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loop. - Woogeun Rhee; Herschel A. Ainspan; Sergey V. Rylov; Alexander V. Rylyakov; Michael P. Beakes; Daniel J. Friedman; Sudhir M. Gowda; Mehmet Soyuer (CICC, 2003)

SiGe BiCMOS integrated circuits for high-speed serial communication links. - Daniel J. Friedman; Mounir Meghelli; Benjamin D. Parker; Jungwook Yang; Herschel A. Ainspan; Alexander V. Rylyakov; Young Hoon Kwark; Mark B. Ritter; Lei Shan; Steven J. Zier; Michael Sorna; Mehmet Soyuer (IBM J. Res. Dev., 2003)

A Silicon 60-GHz Receiver and Transmitter Chipset for Broadband Communications. - Scott K. Reynolds; Brian A. Floyd; Ullrich R. Pfeiffer; Troy J. Beukema; Janusz Grzyb; Chuck Haymes; Brian P. Gaucher; Mehmet Soyuer (IEEE J. Solid State Circuits, 2006)

A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links. - Timothy O. Dickson; Zeynep Toprak Deniz; Martin Cochet; Marcel A. Kossel; Thomas Morf; Young-Ho Choi; Pier Andrea Francese; Matthias Brändli; Troy J. Beukema; Christian W. Baks; Jonathan E. Proesel; John F. Bulzacchelli; et al. (VLSI Technology and Circuits, 2022)

An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS. - Serdar S. Yonar; Pier Andrea Francese; Matthias Brändli; Marcel A. Kossel; Thomas Morf; Jonathan E. Proesel; Sergey V. Rylov; Herschel A. Ainspan; Martin Cochet; Zeynep Toprak Deniz; Timothy O. Dickson; Troy J. Beukema; et al. (VLSI Technology and Circuits, 2022)

A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links. - Timothy O. Dickson; Zeynep Toprak Deniz; Martin Cochet; Troy J. Beukema; Marcel A. Kossel; Thomas Morf; Young-Ho Choi; Pier Andrea Francese; Matthias Brändli; Christian W. Baks; Jonathan E. Proesel; John F. Bulzacchelli; et al. (IEEE J. Solid State Circuits, 2023)