Optimizing LU Decomposition with RISC-V Based Hardware Acceleration. - Mekala Bindu Bhargavi; Grandhala Sri Sai Harshith; Sri Parameswaran; Soumya J. (ISVLSI, 2024)

Optimizing Convolutional Image Processing on RISC-V Using Branch Prediction on FPGA. - Mekala Bindu Bhargavi; Sujay Krishnan Subramanian; Sri Parameswaran; Soumya J. (TENCON, 2024)

Automated Design and Configuration of RISC-V based NoC-MPSoC Framework on FPGA. - Mekala Bindu Bhargavi; Sai Siddharth Rokkam; Sri Parameswaran; Soumya J. (VDAT, 2024)