Spare-cell-aware multilevel analytical placement. - Zhe-Wei Jiang; Meng-Kai Hsu; Yao-Wen Chang; Kai-Yuan Chao (DAC, 2009)

TSV-aware analytical placement for 3D IC designs. - Meng-Kai Hsu; Yao-Wen Chang; Valeriy Balabanov (DAC, 2011)

Routability-driven analytical placement for mixed-size circuit designs. - Meng-Kai Hsu; Sheng Chou; Tzu-Hen Lin; Yao-Wen Chang (ICCAD, 2011)

Structure-aware placement for datapath-intensive circuit designs. - Sheng Chou; Meng-Kai Hsu; Yao-Wen Chang (DAC, 2012)

Unified Analytical Global Placement for Large-Scale Mixed-Size Circuit Designs. - Meng-Kai Hsu; Yao-Wen Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Routability-driven placement for hierarchical mixed-size circuit designs. - Meng-Kai Hsu; Yi-Fang Chen; Chau-Chin Huang; Tung-Chieh Chen; Yao-Wen Chang (DAC, 2013)

TSV-Aware Analytical Placement for 3-D IC Designs Based on a Novel Weighted-Average Wirelength Model. - Meng-Kai Hsu; Valeriy Balabanov; Yao-Wen Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Design and manufacturing process co-optimization in nano-technology. - Meng-Kai Hsu; Nitesh Katta; Homer Yen-Hung Lin; Keny Tzu-Hen Lin; King Ho Tam; Ken Chung-Hsing Wang (ICCAD, 2014)

NTUplace4h: A Novel Routability-Driven Placement Algorithm for Hierarchical Mixed-Size Circuit Designs. - Meng-Kai Hsu; Yi-Fang Chen; Chau-Chin Huang; Sheng Chou; Tzu-Hen Lin; Tung-Chieh Chen; Yao-Wen Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)