Design of rotated QAM mapper/demapper for the DVB-T2 standard. - Meng Li 012; Charbel Abdel Nour; Christophe Jégo; Catherine Douillard (SiPS, 2009)

Efficient iterative receiver for bit-Interleaved Coded Modulation according to the DVB-T2 standard. - Meng Li 012; Charbel Abdel Nour; Christophe Jégo; Jianxiao Yang; Catherine Douillard (ICASSP, 2011)

A shuffled iterative bit-interleaved coded modulation receiver for the DVB-T2 standard: Design, implementation and FPGA prototyping. - Meng Li 012; Charbel Abdel Nour; Christophe Jégo; Jianxiao Yang; Catherine Douillard (SiPS, 2011)

Design, implementation and prototyping of an iterative receiver for bit-interleaved coded modulation system dedicated to DVB-T2. - Meng Li 012 (2012)

A processor based multi-standard low-power LDPC engine for multi-Gbps wireless communication. - Meng Li 012; Frederik Naessens; Min Li 001; Peter Debacker; Claude Desset; Praveen Raghavan; Antoine Dejonghe; Liesbet Van der Perre (GlobalSIP, 2013)

An area and energy efficient half-row-paralleled layer LDPC decoder for the 802.11AD standard. - Meng Li 012; Frederik Naessens; Peter Debacker; Praveen Raghavan; Claude Desset; Min Li 001; Antoine Dejonghe; Liesbet Van der Perre (SiPS, 2013)

Towards approaching near-optimal MIMO detection performance ONAC-programmable baseband processor. - Ubaid Ahmad; Min Li 001; Amir Amin; Meng Li 012; Liesbet Van der Perre; Rudy Lauwereins; Sofie Pollin (ICASSP, 2014)

Computation-skip error resilient scheme for recursive CORDIC. - Yanxiang Huang; Meng Li 012; Chunshu Li; Peter Debacker; Liesbet Van der Perre (SiPS, 2014)

An energy efficient 18Gbps LDPC decoding processor for 802.11ad in 28nm CMOS. - Meng Li 012; Jan-Willem Weijers; Veerle Derudder; Ilse Vos; Maxim Rykunov; Steven Dupont; Peter Debacker; Andy Dewilde; Yanxiang Huang; Liesbet Van der Perre; Wim Van Thillo (A-SSCC, 2015)

Max-log demapper architecture design for DVB-T2 rotated QAM constellations. - Jianxiao Yang; Meng Li 012; Min Li 001; Charbel Abdel Nour; Catherine Douillard; Benoit Geller (SiPS, 2015)

Memory-Reduced Turbo Decoding Architecture Using NII Metric Compression. - Youngjoo Lee; Meng Li 012; Liesbet Van der Perre (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

An Information Theory Perspective for the Binary STT-MRAM Cell Operation Channel. - Jianxiao Yang; Benoit Geller; Meng Li 012; Tong Zhang 002 (IEEE Trans. Very Large Scale Integr. Syst., 2016)

An Energy-Efficient Reconfigurable ASIP Supporting Multi-mode MIMO Detection. - Ubaid Ahmad; Min Li 001; Amir Amin; Meng Li 012; Liesbet Van der Perre; Rudy Lauwereins; Sofie Pollin (J. Signal Process. Syst., 2016)

Computation-skip Error Mitigation Scheme for Power Supply Voltage Scaling in Recursive Applications. - Yanxiang Huang; Meng Li 012; Chunshu Li; Peter Debacker; Liesbet Van der Perre (J. Signal Process. Syst., 2016)

A 100 Gbps LDPC Decoder for the IEEE 802.11ay Standard. - Meng Li 012; Veerle Derudder; Claude Desset; Andy Dewilde; André Bourdoux; Yanxiang Huang (ISTC, 2018)

High-Speed LDPC Decoders Towards 1 Tb/s. - Meng Li 012; Veerle Derudder; Kaoutar Bertrand; Claude Desset; André Bourdoux (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Joint Ap and Hmd Power Optimization of Sub-Thz Virtual Reality Systems. - Meng Li 012; Yigit Ertugrul; Abdur Rahman Mohamed Ismail; Claude Desset; Sofie Pollin (EuCNC/6G Summit, 2025)