An Integrated Framework for Knowledge Management and Discovery of Tropical Cyclone Movements. - James N. K. Liu; Raymond W. M. Kwong; Meng Wang 005; Danny K. Y. Sin (SEKE, 2003)

A novel teleoperation paradigm for human-robot interaction. - Meng Wang 005; James N. K. Liu (RAM, 2004)

Online path searching for autonomous robot navigation. - Meng Wang 005; James N. K. Liu (RAM, 2004)

Behavior-Based Blind Goal-Oriented Robot Navigation by Fuzzy Logic. - Meng Wang 005; James N. K. Liu (KES (1), 2005)

Interactive control for Internet-based mobile robot teleoperation. - Meng Wang 005; James Nga-Kwok Liu (Robotics Auton. Syst., 2005)

iBotGuard: an Internet-based Intelligent Robot security system using Invariant Face Recognition against intruder. - James N. K. Liu; Meng Wang 005; Bo Feng (IEEE Trans. Syst. Man Cybern. Part C, 2005)

Fuzzy Logic based Active Map Learning for Autonomous Robot. - James N. K. Liu; Meng Wang 005 (FUZZ-IEEE, 2006)

Tropical Cyclone Forecast using Angle Features and Time Warping. - James Nga-Kwok Liu; Bo Feng; Meng Wang 005; Weidong Luo (IJCNN, 2006)

Real-Time Loop Scheduling with Energy Optimization Via DVS and ABB for Multi-core Embedded System. - Guochen Hua; Meng Wang 005; Zili Shao; Hui Liu 006; Chun Xue 001 (EUC, 2007)

Interconnection Synthesis of MPSoC Architecture for Gamma Cameras. - Tianmiao Wang; Kai Sun; Hongxing Wei; Meng Wang 005; Zili Shao; Hui Liu 006 (EUC, 2007)

Real-Time Loop Scheduling with Leakage Energy Minimization for Embedded VLIW DSP Processors. - Meng Wang 005; Zili Shao; Chun Xue 001; Edwin Hsing-Mean Sha (RTCSA, 2007)

Implementing Hybrid Operating Systems with Two-Level Hardware Interrupts. - Miao Liu; Zili Shao; Meng Wang 005; Hongxing Wei; Tianmiao Wang (RTSS, 2007)

Real-Time Dynamic Voltage Loop Scheduling for Multi-Core Embedded Systems. - Zili Shao; Meng Wang 005; Ying Chen; Chun Xue 001; Meikang Qiu; Laurence T. Yang; Edwin Hsing-Mean Sha (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Staying-alive and energy-efficient path planning for mobile robots. - Tianmiao Wang; Bin Wang 065; Hongxing Wei; Yunan Cao; Meng Wang 005; Zili Shao (ACC, 2008)

MPSOC Architectural Design and Synthesis for Real-Time Biomedical Signal Processing in Gamma Cameras. - Kai Sun; Hongxing Wei; Tianmiao Wang; Meng Wang 005; Zili Shao; Hui Liu 006 (BIODEVICES (2), 2008)

Overhead-Aware System-Level Joint Energy and Performance Optimization for Streaming Applications on Multiprocessor Systems-on-Chip. - Hui Liu 006; Zili Shao; Meng Wang 005; Ping Chen (ECRTS, 2008)

A State-Based Predictive Approach for Leakage Reduction of Functional Units. - Linfeng Pan; Minyi Guo; Yanqin Yang; Meng Wang 005; Zili Shao (EUC (1), 2008)

A Formal Specification and Verification Framework for Designing and Verifying Reliable and Dependable Software for Computerized Numerical Control (CNC) Systems. - Yunan Cao; Zili Shao; Meng Wang 005; Chun Jason Xue; Youdong Chen; Hongxing Wei; Tianmiao Wang (ICDCS, 2008)

Minimizing Leakage Energy with Modulo Scheduling for VLIW DSP Processors. - Meng Wang 005; Zili Shao; Hui Liu 006; Chun Jason Xue (DIPES, 2008)

Topology-Aware Energy Efficient Task Assignment for Collaborative In-Network Processing in Distributed Sensor Systems. - Baokang Zhao; Meng Wang 005; Zili Shao; Jiannong Cao 001; Keith C. C. Chan; Jinshu Su (DIPES, 2008)

Topology Aware Task Allocation and Scheduling for Real-Time Data Fusion Applications in Networked Embedded Sensor Systems. - Baokang Zhao; Meng Wang 005; Zili Shao; Jiannong Cao 001; Keith C. C. Chan; Jinshu Su (RTCSA, 2008)

Fuzzy logic-based real-time robot navigation in unknown environment with dead ends. - Meng Wang 005; James N. K. Liu (Robotics Auton. Syst., 2008)

Optimized Address Assignment With Array and Loop Transformations for Minimizing Schedule Length. - Chun Jason Xue; Zhiping Jia; Zili Shao; Meng Wang 005; Edwin Hsing-Mean Sha (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Optimal loop parallelization for maximizing iteration-level parallelism. - Duo Liu; Zili Shao; Meng Wang 005; Minyi Guo; Jingling Xue (CASES, 2009)

Dynamic Scratch-Pad Memory Management with Data Pipelining for Embedded Systems. - Yanqin Yang; Meng Wang 005; Zili Shao; Minyi Guo (CSE (2), 2009)

Improving the Reliability of Embedded Systems with Cache and SPM. - Meng Wang 005; Yi Wang 003; Duo Liu; Zili Shao (MASS, 2009)

Loop scheduling with memory access reduction under register constraints for DSP applications. - Meng Wang 005; Duo Liu; Yi Wang 003; Zili Shao (SiPS, 2009)

An effective state-based predictive approach for leakage energy management on embedded systems. - Minyi Guo; Linfeng Pan; Yanqin Yang; Meng Wang 005; Zili Shao (Des. Autom. Embed. Syst., 2009)

An ID-Based Partially Blind Signature Scheme With Adaptive Delegation For Networked Embedded Systems. - Baokang Zhao; Jinshu Su; Wei Peng 005; YingZhi Zeng; Meng Wang 005 (Intell. Autom. Soft Comput., 2009)

Combining Coarse-Grained Software Pipelining with DVS for Scheduling Real-Time Periodic Dependent Tasks on Multi-Core Embedded Systems. - Hui Liu 006; Zili Shao; Meng Wang 005; Junzhao Du; Chun Jason Xue; Zhiping Jia (J. Signal Process. Syst., 2009)

RNFTL: a reuse-aware NAND flash translation layer for flash memory. - Yi Wang 003; Duo Liu; Meng Wang 005; Zhiwei Qin 004; Zili Shao; Yong Guan (LCTES, 2010)

Optimal Task Scheduling by Removing Inter-Core Communication Overhead for Streaming Applications on MPSoC. - Yi Wang 003; Duo Liu; Meng Wang 005; Zhiwei Qin 004; Zili Shao (IEEE Real-Time and Embedded Technology and Applications Symposium, 2010)

Dynamic scratch-pad memory management with data pipelining for embedded systems. - Yanqin Yang; Meng Wang 005; Haijin Yan; Zili Shao; Minyi Guo (Concurr. Comput. Pract. Exp., 2010)

Compiler-assisted leakage-aware loop scheduling for embedded VLIW DSP processors. - Meng Wang 005; Yi Wang 003; Duo Liu; Zhiwei Qin 004; Zili Shao (J. Syst. Softw., 2010)

Design and Synthesis of a Multiprocessor System-on-Chip Architecture for Real-Time Biomedical Signal Processing in Gamma Cameras. - Kai Sun; Meng Wang 005; Zili Shao; Hui Liu 006; Hongxing Wei; Tianmiao Wang (J. Signal Process. Syst., 2010)

On Improving Real-Time Interrupt Latencies of Hybrid Operating Systems with Two-Level Hardware Interrupts. - Miao Liu; Duo Liu; Yi Wang 003; Meng Wang 005; Zili Shao (IEEE Trans. Computers, 2011)

Loop scheduling with memory access reduction subject to register constraints for DSP applications. - Yi Wang 003; Zhiping Jia; Renhai Chen; Meng Wang 005; Duo Liu; Zili Shao (Softw. Pract. Exp., 2014)

Temperature-Aware Data Allocation for Embedded Systems with Cache and Scratchpad Memory. - Zhiping Jia; Yang Li; Yi Wang 003; Meng Wang 005; Zili Shao (ACM Trans. Embed. Comput. Syst., 2015)