NAAS: Neural Accelerator Architecture Search. - Yujun Lin 001; Mengtian Yang; Song Han 003 (DAC, 2021)

Characterizing and Demystifying the Implicit Convolution Algorithm on Commercial Matrix-Multiplication Accelerators. - Yangjie Zhou 001; Mengtian Yang; Cong Guo 003; Jingwen Leng; Yun Liang 001; Quan Chen 002; Minyi Guo; Yuhao Zhu 001 (IISWC, 2021)

SUGAR: Efficient Subgraph-level Training via Resource-aware Graph Partitioning. - Zihui Xue; Yuedong Yang; Mengtian Yang; Radu Marculescu (CoRR, 2022)

Ising-CIM: A Reconfigurable and Scalable Compute Within Memory Analog Ising Accelerator for Solving Combinatorial Optimization Problems. - Shanshan Xie; Siddhartha Raman Sundara Raman; Can Ni; Meizhi Wang; Mengtian Yang; Jaydeep P. Kulkarni (IEEE J. Solid State Circuits, 2022)

A GNN Computing-in-Memory Macro and Accelerator with Analog-Digital Hybrid Transformation and CAMenabled Search-reduce. - Yipeng Wang 017; Shanshan Xie; Jacob N. Rohan; Meizhi Wang; Mengtian Yang; Sirish Oruganti; Jaydeep P. Kulkarni (CICC, 2023)

CIMGN: An Energy-efficient All-digital Compute-in-memory Graph Neural Network Processor. - Yipeng Wang 017; Mengtian Yang; Shanshan Xie; Meizhi Wang; Jaydeep P. Kulkarni (ESSCIRC, 2023)

A 118 GOPS/mm23D eDRAM TensorCore Architecture for Large-scale Matrix Multiplication. - Mengtian Yang; Yipeng Wang 017; Jaydeep P. Kulkarni (HiPC, 2023)

Snap-SAT: A One-Shot Energy-Performance-Aware All-Digital Compute-in-Memory Solver for Large-Scale Hard Boolean Satisfiability Problems. - Shanshan Xie; Mengtian Yang; S. Andrew Lanham; Yipeng Wang 017; Meizhi Wang; Sirish Oruganti; Jaydeep P. Kulkarni (ISSCC, 2023)

CILP: An Arbitrary-bit Precision All-digital Compute-in-memory Solver for Integer Linear Programming Problems. - Mengtian Yang; Yipeng Wang 017; Shanshan Xie; Chieh-Pu Lo; Meizhi Wang; Sirish Oruganti; Rishabh Sehgal; Jaydeep P. Kulkarni (CICC, 2024)

Power and EM Side-Channel-Attack-Resilient AES-128 Core with Round-Aligned Globally-Synchronous-Locally-Asynchronous Operation Based on Tunable Replica Circuits. - Sirish Oruganti; Meizhi Wang; Vishnuvardhan V. Iyer; Yipeng Wang 017; Mengtian Yang; Raghavan Kumar; Sanu K. Mathew; Jaydeep P. Kulkarni (ISSCC, 2024)

30.6 Vecim: A 289.13GOPS/W RISC-V Vector Co-Processor with Compute-in-Memory Vector Register File for Efficient High-Performance Computing. - Yipeng Wang 017; Mengtian Yang; Chieh-Pu Lo; Jaydeep P. Kulkarni (ISSCC, 2024)