Analysis of charge-pump phase-locked loops. - Pavan Kumar Hanumolu; Merrick Brownlee; Kartikeya Mayaram; Un-Ku Moon (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

A 0.5 to 2.5GHz PLL with Fully Differential Supply-Regulated Tuning. - Merrick Brownlee; Pavan Kumar Hanumolu; Kartikeya Mayaram; Un-Ku Moon (ISSCC, 2006)

A 0.5-GHz to 2.5-GHz PLL With Fully Differential Supply Regulated Tuning. - Merrick Brownlee; Pavan Kumar Hanumolu; Kartikeya Mayaram; Un-Ku Moon (IEEE J. Solid State Circuits, 2006)

A 3.2Gb/s Oversampling CDR with Improved Jitter Tolerance. - Merrick Brownlee; Pavan Kumar Hanumolu; Un-Ku Moon (CICC, 2007)