A task-level superscalar microarchitecture for large scale chip multiprocessors. - Jianqing Xiao; Pengwei Lv; Mian Lou; Xunying Zhang; Xubang Shen (RTCSA, 2014)

DAGNN-RE: Directed acyclic graph neural network for functional reverse engineering of gate-level netlist. - Zongtai Li; Liang Yang; Mian Lou (Integr., 2025)