30.1 A 28nm 127.54TFLOPS/W MXFP6 and 117.42TFLOPS/W MXFP8 Compute-in-Memory Macro with Adaptive-Preserved-Bit-Width and Serial-Dual-Bit-Sliding Schemes. - Xing Wang; Yucheng Du; Tianhui Jiao; Defa Wu; Xi Chen 107; Miaoyu Tang; Yi Yang 001; Zhichao Liu; An Guo 001; Gaoming Fu; Peng Li; Jun Dong; et al. (ISSCC, 2026)