A low-power parallel design of discrete wavelet transform using subthreshold voltage technology. - Michael B. Henry; Syed Imtiaz Haider; Leyla Nazhandali (CASES, 2008)

Fast Simulation Framework for Subthreshold Circuits. - Michael B. Henry; Steven B. Griffin; Leyla Nazhandali (ISCAS, 2009)

From transistors to MEMS: Throughput-aware power gating in CMOS circuits. - Michael B. Henry; Leyla Nazhandali (DATE, 2010)

A case for NEMS-based functional-unit power gating of low-power embedded microprocessors. - Michael B. Henry; Meeta Srivastav; Leyla Nazhandali (DAC, 2011)

Pre-silicon Characterization of NIST SHA-3 Final Round Candidates. - Xu Guo 001; Meeta Srivastav; Sinan Huang; Dinesh Ganta; Michael B. Henry; Leyla Nazhandali; Patrick Schaumont (DSD, 2011)

MEMS-Based Power Gating for Highly Scalable Periodic and Event-Driven Processing. - Michael B. Henry; Robert Lyerly; Leyla Nazhandali; Adam Fruehling; Dimitrios Peroulis (VLSI Design, 2011)

Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture. - Michael B. Henry; Leyla Nazhandali (Trans. High Perform. Embed. Archit. Compil., 2011)

Design techniques for functional-unit power gating in the Ultra-Low-Voltage region. - Michael B. Henry; Leyla Nazhandali (ASP-DAC, 2012)

ASIC implementations of five SHA-3 finalists. - Xu Guo 001; Meeta Srivastav; Sinan Huang; Dinesh Ganta; Michael B. Henry; Leyla Nazhandali; Patrick Schaumont (DATE, 2012)

SPICE-compatible compact model for graphene field-effect transistors. - Michael B. Henry; Shamik Das (ISCAS, 2012)

Design of low-power, scalable-throughput systems at near/sub threshold voltage. - Meeta Srivastav; Michael B. Henry; Leyla Nazhandali (ISQED, 2012)

From Transistors to NEMS: Highly Efficient Power-Gating of CMOS Circuits. - Michael B. Henry; Leyla Nazhandali (ACM J. Emerg. Technol. Comput. Syst., 2012)

Design of energy-efficient, adaptable throughput systems at near/sub-threshold voltage. - Meeta Srivastav; Michael B. Henry; Leyla Nazhandali (ACM Trans. Design Autom. Electr. Syst., 2012)

Design and benchmarking of an ASIC with five SHA-3 finalist candidates. - Meeta Srivastav; Xu Guo 001; Sinan Huang; Dinesh Ganta; Michael B. Henry; Leyla Nazhandali; Patrick Schaumont (Microprocess. Microsystems, 2013)

NEMS-Based Functional Unit Power-Gating: Design, Analysis, and Optimization. - Michael B. Henry; Leyla Nazhandali (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Fast Approximation Framework for Timing and Power Analysis of Ultra-Low-Voltage Circuits. - Lalleh Rafeei; Michael B. Henry; Leyla Nazhandali (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

27.8 A static contention-free single-phase-clocked 24T flip-flop in 45nm for low-power applications. - Yejoong Kim; Wanyeong Jung; Inhee Lee 001; Qing Dong 001; Michael B. Henry; Dennis Sylvester; David T. Blaauw (ISSCC, 2014)

16.3 A 23Mb/s 23pJ/b fully synthesized true-random-number generator in 28nm and 65nm CMOS. - Kaiyuan Yang 001; David Fick; Michael B. Henry; Yoonmyung Lee; David T. Blaauw; Dennis Sylvester (ISSCC, 2014)

An Energy Efficient Full-Frame Feature Extraction Accelerator With Shift-Latch FIFO in 28 nm CMOS. - Dongsuk Jeon; Michael B. Henry; Yejoong Kim; Inhee Lee 001; Zhengya Zhang; David T. Blaauw; Dennis Sylvester (IEEE J. Solid State Circuits, 2014)

24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS. - Skylar Skrzyniarz; Laura Fick; Jinal Shah; Yejoong Kim; Dennis Sylvester; David T. Blaauw; David Fick; Michael B. Henry (ISSCC, 2016)

Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part I - Analog Circuit Techniques. - Taekwang Jang; Gyouho Kim; Benjamin P. Kempke; Michael B. Henry; Nikolaos Chiotellis; Carl Pfeiffer; Dongkwun Kim; Yejoong Kim; Zhiyoong Foo; Hyeongseok Kim; Anthony Grbic; Dennis Sylvester; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits. - Tae-Kwang Jang; Gyouho Kim; Benjamin P. Kempke; Michael B. Henry; Nikolaos Chiotellis; Carl Pfeiffer; Dongkwun Kim; Yejoong Kim; Zhiyoong Foo; Hyeongseok Kim; Anthony Grbic; Dennis Sylvester; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Analog Matrix Processor for Edge AI Real-Time Video Analytics. - Laura Fick; Skylar Skrzyniarz; Malav Parikh; Michael B. Henry; David Fick (ISSCC, 2022)