A performance analysis of Pentium processor systems. - Michael Bekerman; Avi Mendelson (IEEE Micro, 1995)

Performance and hardware complexity tradeoffs in designing multithreaded architectures. - Michael Bekerman; Avi Mendelson; Gad Sheaffer (IEEE PACT, 1996)

A Novel Renaming Scheme to Exploit Value Temporal Locality Through Physical Register Reuse and Unification. - Stéphan Jourdan; Ronny Ronen; Michael Bekerman; Bishara Shomar; Adi Yoaz (MICRO, 1998)

Correlated Load-Address Predictors. - Michael Bekerman; Stéphan Jourdan; Ronny Ronen; Gilad Kirshenboim; Lihu Rappoport; Adi Yoaz; Uri C. Weiser (ISCA, 1999)

Design Alternatives of Multithreaded Architecture. - Avi Mendelson; Michael Bekerman (Int. J. Parallel Program., 1999)

Early load address resolution via register tracking. - Michael Bekerman; Adi Yoaz; Freddy Gabbay; Stéphan Jourdan; Maxim Kalaev; Ronny Ronen (ISCA, 2000)