Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips. - Michael C. Huang 001; Jose Renau; Seung-Moon Yoo; Josep Torrellas (Intelligent Memory Systems, 2000)

A framework for dynamic energy efficiency and temperature management. - Michael C. Huang 001; Jose Renau; Seung-Moon Yoo; Josep Torrellas (MICRO, 2000)

L1 data cache decomposition for energy efficiency. - Michael C. Huang 001; Jose Renau; Seung-Moon Yoo; Josep Torrellas (ISLPED, 2001)

The Design of DEETM: a Framework for Dynamic Energy Efficiency and Temperature Management. - Michael C. Huang 001; Jose Renau; Seung-Moon Yoo; Josep Torrellas (J. Instr. Level Parallelism, 2001)

Energy-efficient hybrid wakeup logic. - Michael C. Huang 001; Jose Renau; Josep Torrellas (ISLPED, 2002)

Cherry: checkpointed early resource recycling in out-of-order microprocessors. - José F. Martínez; Jose Renau; Michael C. Huang 001; Milos Prvulovic; Josep Torrellas (MICRO, 2002)

Managing Processor Adaptation for Energy Reduction and Temperature Control - Michael C. Huang 001 (2002)

Positional Adaptation of Processors: Application to Energy Reduction. - Michael C. Huang 001; Jose Renau; Josep Torrellas (ISCA, 2003)

Branch prediction on demand: an energy-efficient solution. - Daniel Chaver; Luis Piñuel; Manuel Prieto 001; Francisco Tirado; Michael C. Huang 001 (ISLPED, 2003)

Dynamically Tuning Processor Resources with Adaptive Processing. - David H. Albonesi; Rajeev Balasubramonian; Steve Dropsho; Sandhya Dwarkadas; Eby G. Friedman; Michael C. Huang 001; Volkan Kursun; Grigorios Magklis; Michael L. Scott; Greg Semeraro; Pradip Bose; Alper Buyuktosunoglu; et al. (Computer, 2003)

Customizing the Branch Predictor to Reduce Complexity and Energy Consumption. - Michael C. Huang 001; Daniel Chaver; Luis Piñuel; Manuel Prieto 001; Francisco Tirado (IEEE Micro, 2003)

The Thrifty Barrier: Energy-Aware Synchronization in Shared-Memory Multiprocessors. - Jian Li 059; José F. Martínez; Michael C. Huang 001 (HPCA, 2004)

EXPERT: expedited simulation exploiting program behavior repetition. - Wei Liu; Michael C. Huang 001 (ICS, 2004)

Dynamically reducing pressure on the physical register file through simple register sharing. - Liem Tran; Nicholas Nelson 001; Fung Ngai; Steve Dropsho; Michael C. Huang 001 (ISPASS, 2004)

Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance. - M. Wasiur Rashid; Edwin J. Tan; Michael C. Huang 001; David H. Albonesi (IEEE PACT, 2005)

Load-Store Queue Management: an Energy-Efficient Design Based on a State-Filtering Mechanism.. - Fernando Castro; Daniel Chaver; Luis Piñuel; Manuel Prieto 001; Francisco Tirado; Michael C. Huang 001 (ICCD, 2005)

Energy-aware fetch mechanism: trace cache and BTB customization. - Daniel Chaver; Miguel A. Rojas; Luis Piñuel; Manuel Prieto 001; Francisco Tirado; Michael C. Huang 001 (ISLPED, 2005)

A Power-Efficient and Scalable Load-Store Queue Design. - Fernando Castro; Daniel Chaver; Luis Piñuel; Manuel Prieto 001; Michael C. Huang 001; Francisco Tirado (PATMOS, 2005)

Power-Efficient Error Tolerance in Chip Multiprocessors. - M. Wasiur Rashid; Edwin J. Tan; Michael C. Huang 001; David H. Albonesi (IEEE Micro, 2005)

SEED: scalable, efficient enforcement of dependences. - Francisco J. Mesa-Martinez; Michael C. Huang 001; Jose Renau (PACT, 2006)

Injection-Locked Clocking: A New GHz Clock Distribution Scheme. - Lin Zhang; Berkehan Ciftcioglu; Michael C. Huang 001; Hui Wu 007 (CICC, 2006)

Software-hardware cooperative memory disambiguation. - Ruke Huang; Alok Garg; Michael C. Huang 001 (HPCA, 2006)

Program phase detection and exploitation. - Chen Ding 001; Sandhya Dwarkadas; Michael C. Huang 001; Kai Shen; John B. Carter (IPDPS, 2006)

Slackened Memory Dependence Enforcement: Combining Opportunistic Forwarding with Decoupled Verification. - Alok Garg; M. Wasiur Rashid; Michael C. Huang 001 (ISCA, 2006)

Substituting associative load queue with simple hash tables in out-of-order microprocessors. - Alok Garg; Fernando Castro; Michael C. Huang 001; Daniel Chaver; Luis Piñuel; Manuel Prieto 001 (ISLPED, 2006)

DMDC: Delayed Memory Dependence Checking through Age-Based Filtering. - Fernando Castro; Luis Piñuel; Daniel Chaver; Manuel Prieto 001; Michael C. Huang 001; Francisco Tirado (MICRO, 2006)

A Load-Store Queue Design Based on Predictive State Filtering. - Fernando Castro; Daniel Chaver; Luis Piñuel; Manuel Prieto 001; Michael C. Huang 001; Francisco Tirado (J. Low Power Electron., 2006)

A Memory Soft Error Measurement on Production Systems. - Xin Li; Kai Shen; Michael C. Huang 001; Lingkun Chu (USENIX ATC, 2007)

Improving support for locality and fine-grain sharing in chip multiprocessors. - Hemayet Hossain; Sandhya Dwarkadas; Michael C. Huang 001 (PACT, 2008)

Topic 4: High Performance Architectures and Compilers. - Koen De Bosschere; Ayal Zaks; Michael C. Huang 001; Luis Piñuel (Euro-Par, 2008)

Supporting highly-decoupled thread-level redundancy for parallel programs. - M. Wasiur Rashid; Michael C. Huang 001 (HPCA, 2008)

A performance-correctness explicitly-decoupled architecture. - Alok Garg; Michael C. Huang 001 (MICRO, 2008)

Injection-Locked Clocking: A Low-Power Clock Distribution Scheme for High-Performance Microprocessors. - Lin Zhang; Aaron Carpenter; Berkehan Ciftcioglu; Alok Garg; Michael C. Huang 001; Hui Wu 007 (IEEE Trans. Very Large Scale Integr. Syst., 2008)

DDCache: Decoupled and Delegable Cache Data and Metadata. - Hemayet Hossain; Sandhya Dwarkadas; Michael C. Huang 001 (PACT, 2009)

Variation-tolerant hierarchical voltage monitoring circuit for soft error detection. - Ashay Narsale; Michael C. Huang 001 (ISQED, 2009)

Replacing Associative Load Queues: A Timing-Centric Approach. - Fernando Castro; Regana Noor; Alok Garg; Daniel Chaver; Michael C. Huang 001; Luis Piñuel; Manuel Prieto 001; Francisco Tirado (IEEE Trans. Computers, 2009)

An intra-chip free-space optical interconnect. - Jing Xue; Alok Garg; Berkehan Ciftcioglu; Jianyun Hu; Shang Wang; Ioannis Savidis; Manish Jain; Rebecca Berman; Peng Liu 016; Michael C. Huang 001; Hui Wu 007; Eby G. Friedman; et al. (ISCA, 2010)

A Realistic Evaluation of Memory Hardware Errors and Software System Susceptibility. - Xin Li; Michael C. Huang 001; Kai Shen; Lingkun Chu (USENIX ATC, 2010)

Speculative Parallelization in Decoupled Look-ahead. - Alok Garg; Raj Parihar; Michael C. Huang 001 (PACT, 2011)

POPS: Coherence Protocol Optimization for Both Private and Shared Data. - Hemayet Hossain; Sandhya Dwarkadas; Michael C. Huang 001 (PACT, 2011)

Efficient data streaming with on-chip accelerators: Opportunities and challenges. - Rui Hou 001; Lixin Zhang 002; Michael C. Huang 001; Kun Wang; Hubertus Franke; Yi Ge; Xiaotao Chang (HPCA, 2011)

A case for globally shared-medium on-chip interconnect. - Aaron Carpenter; Jianyun Hu; Jie Xu; Michael C. Huang 001; Hui Wu 007 (ISCA, 2011)

A design space exploration of transmission-line links for on-chip interconnect. - Aaron Carpenter; Jianyun Hu; Michael C. Huang 001; Hui Wu 007; Peng Liu 016 (ISLPED, 2011)

Power-Aware Run-Time Incremental Mapping for 3-D Networks-on-Chip. - Xiaohang Wang 001; Maurizio Palesi; Mei Yang 001; Yingtao Jiang; Michael C. Huang 001; Peng Liu 016 (NPC, 2011)

Low latency and energy efficient multicasting schemes for 3D NoC-based SoCs. - Xiaohang Wang 001; Maurizio Palesi; Mei Yang 001; Yingtao Jiang; Michael C. Huang 001; Peng Liu 016 (VLSI-SoC, 2011)

Particle-in-cell simulations with charge-conserving current deposition on graphic processing units. - Xianglong Kong; Michael C. Huang 001; Chuang Ren; Viktor K. Decyk (J. Comput. Phys., 2011)

Enhancing effective throughput for transmission line-based bus. - Aaron Carpenter; Jianyun Hu; Övünç Kocabas; Michael C. Huang 001; Hui Wu 007 (ISCA, 2012)

Using Transmission Lines for Global On-Chip Communication. - Aaron Carpenter; Jianyun Hu; Jie Xu; Michael C. Huang 001; Hui Wu 007; Peng Liu 016 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Building expressive, area-efficient coherence directories. - Lei Fang; Peng Liu 016; Qi Hu; Michael C. Huang 001; Guofan Jiang (PACT, 2013)

Assessment of cloud-based health monitoring using Homomorphic Encryption. - Övünç Kocabas; Tolga Soyata; Jean-Philippe Couderc; Mehmet K. Aktas; Jean Xia; Michael C. Huang 001 (ICCD, 2013)

A coldness metric for cache optimization. - Raj Parihar; Chen Ding 001; Michael C. Huang 001 (MSPC@PLDI, 2013)

Energy Efficient Run-Time Incremental Mapping for 3-D Networks-on-Chip. - Xiaohang Wang 001; Peng Liu 016; Mei Yang 001; Maurizio Palesi; Yingtao Jiang; Michael C. Huang 001 (J. Comput. Sci. Technol., 2013)

Protection and utilization in shared cache through rationing. - Raj Parihar; Jacob Brock; Chen Ding 001; Michael C. Huang 001 (PACT, 2014)

Accelerating decoupled look-ahead via weak dependence removal: A metaheuristic approach. - Raj Parihar; Michael C. Huang 001 (HPCA, 2014)

DEAM: Decoupled, Expressive, Area-Efficient Metadata Cache. - Peng Liu 016; Lei Fang; Michael C. Huang 001 (J. Comput. Sci. Technol., 2014)

Load Balancing in Decoupled Look-ahead: A Do-It-Yourself (DIY) Approach. - Raj Parihar; Michael C. Huang 001 (PACT, 2015)

Exploiting Transmission Lines on Heterogeneous Networks-on-Chip to Improve the Adaptivity and Efficiency of Cache Coherence. - Qi Hu; Peng Liu 016; Michael C. Huang 001; Xiang-Hui Xie 001 (NOCS, 2015)

Venice: Exploring server architectures for effective resource sharing. - Jianbo Dong; Rui Hou 001; Michael C. Huang 001; Tao Jiang 010; Boyan Zhao; Sally A. McKee; Haibin Wang; Xiaosong Cui; Lixin Zhang 002 (HPCA, 2016)

Hardware support for protective and collaborative cache sharing. - Raj Parihar; Jacob Brock; Chen Ding 001; Michael C. Huang 001 (ISMM, 2016)

Threads and Data Mapping: Affinity Analysis for Traffic Reduction. - Qi Hu; Peng Liu 016; Michael C. Huang 001 (IEEE Comput. Archit. Lett., 2016)

Heterogeneous 3-D circuits: Integrating free-space optics with CMOS. - Ioannis Savidis; Berkehan Ciftcioglu; Jie Xu; Jianyun Hu; Manish Jain; Rebecca Berman; Jing Xue; Peng Liu 016; Duncan Moore; Gary Wicks; Michael C. Huang 001; Hui Wu 007; et al. (Microelectron. J., 2016)

Thread-Aware Adaptive Prefetcher on Multicore Systems: Improving the Performance for Multithreaded Workloads. - Peng Liu 016; Jiyang Yu; Michael C. Huang 001 (ACM Trans. Archit. Code Optim., 2016)

Building Expressive and Area-Efficient Directories with Hybrid Representation and Adaptive Multi-Granular Tracking. - Peng Liu 016; Lei Fang; Michael C. Huang 001; Qi Hu; Guofan Jiang (IEEE Trans. Computers, 2016)

DRUT: An Efficient Turbo Boost Solution via Load Balancing in Decoupled Look-Ahead Architecture. - Raj Parihar; Michael C. Huang 001 (PACT, 2017)

T2: A Highly Accurate and Energy Efficient Stride Prefetcher. - Sushant Kondguli; Michael C. Huang 001 (ICCD, 2017)

Redundant Memory Array Architecture for Efficient Selective Protection. - Ruohuang Zheng; Michael C. Huang 001 (ISCA, 2017)

Division of Labor: A More Effective Approach to Prefetching. - Sushant Kondguli; Michael C. Huang 001 (ISCA, 2018)

High Swing Pulse-Amplitude Modulation of Transmission Line Links for On-Chip Communication. - Richard Afoakwa; Lejie Lu; Yong Wang 026; Hui Wu 007; Michael C. Huang 001 (ISCAS, 2018)

Hadoop Configuration Tuning With Ensemble Modeling and Metaheuristic Optimization. - Xingcheng Hua; Michael C. Huang 001; Peng Liu 016 (IEEE Access, 2018)

Bootstrapping: Using SMT Hardware to Improve Single-Thread Performance. - Sushant Kondguli; Michael C. Huang 001 (IEEE Comput. Archit. Lett., 2018)

A Case for a More Effective, Power-Efficient Turbo Boosting. - Sushant Kondguli; Michael C. Huang 001 (ACM Trans. Archit. Code Optim., 2018)

Venice: An Effective Resource Sharing Architecture for Data Center Servers. - Boyan Zhao; Rui Hou 001; Jianbo Dong; Michael C. Huang 001; Sally A. McKee; Qianlong Zhang; Yueji Liu; Ye Li; Lixin Zhang 002; Dan Meng 002 (ACM Trans. Comput. Syst., 2018)

To Stack or Not To Stack. - Richard Afoakwa; Lejie Lu; Hui Wu 007; Michael C. Huang 001 (PACT, 2019)

R3-DLA (Reduce, Reuse, Recycle): A More Efficient Approach to Decoupled Look-Ahead Architectures. - Sushant Kondguli; Michael C. Huang 001 (HPCA, 2019)

Concurrent Multipoint-to-Multipoint Communication on Interposer Channels. - Lejie Lu; Richard Afoakwa; Michael C. Huang 001; Hui Wu 007 (ISLPED, 2019)

CMOS Ising Machines with Coupled Bistable Nodes. - Richard Afoakwa; Yiqiao Zhang; Uday Kumar Reddy Vengalam; Zeljko Ignjatovic; Michael C. Huang 001 (CoRR, 2020)

A Lightweight Isolation Mechanism for Secure Branch Predictors. - Lutan Zhao; Peinan Li; Rui Hou 001; Michael C. Huang 001; Jiazhen Li; Lixin Zhang 002; Xuehai Qian; Dan Meng 002 (DAC, 2021)

BRIM: Bistable Resistively-Coupled Ising Machine. - Richard Afoakwa; Yiqiao Zhang; Uday Kumar Reddy Vengalam; Zeljko Ignjatovic; Michael C. Huang 001 (HPCA, 2021)

Exploiting Security Dependence for Conditional Speculation Against Spectre Attacks. - Lutan Zhao; Peinan Li; Rui Hou 001; Michael C. Huang 001; Peng Liu 005; Lixin Zhang 002; Dan Meng 002 (IEEE Trans. Computers, 2021)

HyBP: Hybrid Isolation-Randomization Secure Branch Predictor. - Lutan Zhao; Peinan Li; Rui Hou 001; Michael C. Huang 001; Xuehai Qian; Lixin Zhang 002; Dan Meng 002 (HPCA, 2022)

QuBRIM: A CMOS Compatible Resistively-Coupled Ising Machine with Quantized Nodal Interactions. - Yiqiao Zhang; Uday Kumar Reddy Vengalam; Anshujit Sharma; Michael C. Huang 001; Zeljko Ignjatovic (ICCAD, 2022)

Increasing ising machine capacity with multi-chip architectures. - Anshujit Sharma; Richard Afoakwa; Zeljko Ignjatovic; Michael C. Huang 001 (ISCA, 2022)

A CMOS Compatible Bistable Resistively-coupled Ising Machine-BRIM. - Yiqiao Zhang; Richard Afoakwa; Uday Kumar Reddy Vengalam; Michael C. Huang 001; Zeljko Ignjatovic (ISCAS, 2022)

LoopIn: A Loop-Based Simulation Sampling Mechanism. - Uday Kumar Reddy Vengalam; Anshujit Sharma; Michael C. Huang 001 (ISPASS, 2022)

Irrelevant Data Traffic in Modern Low Power GPU Architectures. - Anshujit Sharma; Sushant Kondguli; Michael C. Huang 001 (NAS, 2022)

Ising-Traffic: Using Ising Machine Learning to Predict Traffic Congestion under Uncertainty. - Zhenyu Pan; Anshujit Sharma; Jerry Yao-Chieh Hu; Zhuo Liu; Ang Li 006; Han Liu 001; Michael C. Huang 001; Tong Geng (AAAI, 2023)

Ising-CF: A Pathbreaking Collaborative Filtering Method Through Efficient Ising Machine Learning. - Zhuo Liu; Yunan Yang; Zhenyu Pan; Anshujit Sharma; Amit Hasan 001; Caiwen Ding; Ang Li 006; Michael C. Huang 001; Tong Geng (DAC, 2023)

Supporting Energy-based Learning with an Ising Machine substrate: a Case Study on RBM. - Uday Kumar Reddy Vengalam; Yongchao Liu; Tong Geng; Hui Wu 007; Michael C. Huang 001 (MICRO, 2023)

Combining Cubic Dynamical Solvers with Make/Break Heuristics to Solve SAT. - Anshujit Sharma; Matthew X. Burns; Michael C. Huang 001 (SAT, 2023)

Augmented Electronic Ising Machine as an Effective SAT Solver. - Anshujit Sharma; Matthew X. Burns; Andrew Hahn; Michael C. Huang 001 (CoRR, 2023)

Efficient LDPC Decoding using Physical Computation. - Uday Kumar Reddy Vengalam; Andrew Hahn; Yongchao Liu; Anshujit Sharma; Hui Wu 007; Michael C. Huang 001 (CoRR, 2023)

Extending Power of Nature from Binary to Real-Valued Graph Learning in Real World. - Chunshu Wu; Ruibing Song; Chuan Liu 001; Yunan Yang; Ang Li 006; Michael C. Huang 001; Tong Geng (ICLR, 2024)

DS-GL: Advancing Graph Learning via Harnessing Nature's Power within Scalable Dynamical Systems. - Ruibing Song; Chunshu Wu; Chuan Liu 001; Ang Li 006; Michael C. Huang 001; Tong Geng (ISCA, 2024)

HyperTEE: A Decoupled TEE Architecture with Secure Enclave Management. - Yunkai Bai; Peinan Li; Yubiao Huang; Michael C. Huang 001; Shijun Zhao; Lutan Zhao; Fengwei Zhang; Dan Meng 002; Rui Hou 001 (MICRO, 2024)

Provable Accuracy Bounds for Hybrid Dynamical Optimization and Sampling. - Matthew X. Burns; Qingyuan Hou; Michael C. Huang 001 (CoRR, 2024)

Nature-GL: A Revolutionary Learning Paradigm Unleashing Nature's Power in Real-World Spatial-Temporal Graph Learning. - Chuan Liu 001; Chunshu Wu; Ruibing Song; Yousu Chen; Ang Li 006; Michael C. Huang 001; Tony Tong Geng (ASP-DAC, 2025)

Integrated Hardware Annealing Based on Langevin Dynamics for Ising Machines. - Yongchao Liu; Lianlong Sun 001; Michael C. Huang 001; Hui Wu 007 (DATE, 2025)

Provable Convergence Bounds for Hybrid Dynamical Sampling and Optimization. - Matthew X. Burns; Qingyuan Hou; Michael C. Huang 001 (ICLR, 2025)

Ising machine based on charge re-distribution. - Yongchao Liu; Lianlong Sun 001; Matthew X. Burns; Michael C. Huang 001; Hui Wu 007 (ISCAS, 2025)

Limitations in Parallel Ising Machine Networks: Theory and Practice. - Matthew X. Burns; Michael C. Huang 001 (CoRR, 2025)

Enhancing Oscillator-Based Ising Machine Models with Amplitude Dynamics and Polynomial Interactions. - Lianlong Sun 001; Matthew X. Burns; Michael C. Huang 001 (CoRR, 2025)