Uniform approximation of discrete-time nonlinear systems. - Michael Ciraula; Irwin W. Sandberg (IJCNN, 1999)

An Integrated Quad-Core Opteron Processor. - J. Dorsey; S. Searles; Michael Ciraula; S. Johnson; N. Bujanos; D. Wu; M. Braganza; S. Meyers; E. Fang; R. Kumar (ISSCC, 2007)

A 2ns-read-latency 4Mb embedded floating-body memory macro in 45nm SOI technology. - Anant Singh; Michael Ciraula; Don Weiss; John J. Wuu; Philippe Bauser; Paul de Champs; Hamid Daghighian; David E. Fisch; Philippe Graber; Michel Bron (ISSCC, 2009)

An 8MB level-3 cache in 32nm SOI with column-select aliasing. - Don Weiss; Michael Dreesen; Michael Ciraula; Carson Henrion; Chris Helt; Ryan Freese; Tommy Miles; Anita Karegar; Russell Schreiber; Bryan Schneller; John J. Wuu (ISSCC, 2011)

3D V-Cache: the Implementation of a Hybrid-Bonded 64MB Stacked Cache for a 7nm x86-64 CPU. - John J. Wuu; Rahul Agarwal; Michael Ciraula; Carl Dietz; Brett Johnson; Dave Johnson 002; Russell Schreiber; Raja Swaminathan; Will Walker; Samuel Naffziger (ISSCC, 2022)