A 250-MHz 5-W PowerPC microprocessor with on-chip L2 cache controller. - Gianfranco Gerosa; Mike Alexander; Jose Alvarez; Cody Croxton; Michael D'Addeo; A. Richard Kennedy; Carmine Nicoletta; James P. Nissen; Ross Philip; Paul Reed; Hector Sanchez; Scott A. Taylor; et al. (IEEE J. Solid State Circuits, 1997)

A Sub-1W to 2W Low-Power IA Processor for Mobile Internet Devices and Ultra-Mobile PCs in 45nm Hi-Κ Metal Gate CMOS. - Gianfranco Gerosa; Steve Curtis; Michael D'Addeo; Bo Jiang; Belliappa Kuttanna; Feroze Merchant; Binta Patel; Mohammed H. Taufique; Haytham Samarchi (ISSCC, 2008)

A Sub-2 W Low Power IA Processor for Mobile Internet Devices in 45 nm High-k Metal Gate CMOS. - Gianfranco Gerosa; Steve Curtis; Michael D'Addeo; Bo Jiang; Belliappa Kuttanna; Feroze Merchant; Binta Patel; Mohammed H. Taufique; Haytham Samarchi (IEEE J. Solid State Circuits, 2009)