Dynamic state-retention flip flop for fine-grained sleep-transistor scheme. - Stephan Henzler; Thomas Nirschi; Christian Pacha; Peter Spindler; Philip Teichmann; Michael Fulde; Jürgen Fischer; Matthias Eireiner; Thomas Fischer; Georg Georgakos; Jörg Berthold; Doris Schmitt-Landsiedel (ESSCIRC, 2005)

Layout options for stability tuning of SRAM cells in multi-gate-FET technologies. - Florian Bauer; Klaus von Arnim; Christian Pacha; Thomas Schulz; Michael Fulde; Axel Nackaerts; M. Jurczak; Wade Xiong; K. T. San; C. Rinn Cleavelin; Klaus Schruefer; Georg Georgakos; et al. (ESSCIRC, 2007)

Analog design challenges and trade-offs using emerging materials and devices. - Michael Fulde; Abdelkarim Mercha; Cedric Gustin; Bertrand Parvais; Vaidyanathan Subramanian; Klaus von Arnim; Florian Bauer; Klaus Schruefer; Doris Schmitt-Landsiedel; Gerhard Knoblinger (ESSCIRC, 2007)

Advances in Multi-Gate MOSFET Circuit Design. - Michael Fulde; Klaus von Arnim; Christian Pacha; Florian Bauer; Christian Russ; Domagoj Siprak; Wade Xiong; Andrew Marshall; C. Rinn Cleavelin; Klaus Schruefer; Doris Schmitt-Landsiedel; Gerhard Knoblinger (ICECS, 2007)

Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits. - Michael Fulde; Doris Schmitt-Landsiedel; Gerhard Knoblinger (ISCAS, 2007)

Assessment of the impact of technology scaling on the performance of LC-VCOs. - Davide Ponton; Gerhard Knoblinger; Andreas Roithmeier; Marc Tiebout; Michael Fulde; Pierpaolo Palestri (ESSCIRC, 2009)

FinFET RF receiver building blocks operating above 10 GHz. - Domagoj Siprak; Piet Wambacq; Bertrand Parvais; Abdelkarim Mercha; Michael Fulde; Jesenka Veledar Kruger; Morin Dehan; Stefaan Decoutere (ESSCIRC, 2009)

Design of Low-Voltage Bandgap Reference Circuits in Multi-Gate CMOS Technologies. - Michael Fulde; Martin Wirnshofer; Gerhard Knoblinger; Doris Schmitt-Landsiedel (ISCAS, 2009)

Reliability assessment of voltage controlled oscillators in 32nm high-κ metal gate technology. - Florian Chouard; Michael Fulde; Doris Schmitt-Landsiedel (ESSCIRC, 2010)

An analog perspective on device reliability in 32nm high-κ metal gate technology. - Florian Chouard; Shailesh More; Michael Fulde; Doris Schmitt-Landsiedel (DDECS, 2011)

An aging suppression and calibration approach for differential amplifiers in advanced CMOS technologies. - Florian Chouard; Shailesh More; Michael Fulde; Doris Schmitt-Landsiedel (ESSCIRC, 2011)

Reducing impact of degradation on analog circuits by chopper stabilization and autozeroing. - Shailesh More; Michael Fulde; Florian Chouard; Doris Schmitt-Landsiedel (ISQED, 2011)

A digitally controlled DC-DC converter for SoC in 28nm CMOS. - Franz Kuttner; Harun Habibovic; Thomas Hartig; Michael Fulde; Gernot Babin; Andreas Santner; Peter Bogner; Claus Kropf; Harald Riesslegger; Uwe Hodel (ISSCC, 2011)

LC-VCO in the 3.3- to 4-GHz Band Implemented in 32-nm Low-Power CMOS Technology. - Davide Ponton; Gerhard Knoblinger; Andreas Roithmeier; Federico Cernoia; Marc Tiebout; Michael Fulde; Pierpaolo Palestri (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

13.2 A digital multimode polar transmitter supporting 40MHz LTE Carrier Aggregation in 28nm CMOS. - Michael Fulde; Alexander Belitzer; Zdravko Boos; Michael Bruennert; Jonas Fritzin; Hans Geltinger; Marcus Groinig; Daniel Gruber; Simon Gruenberger; Thomas Hartig; Vahur Kampus; Boris Kapfelsperger; et al. (ISSCC, 2017)

A Nonlinear Switched State-Space Model for Capacitive RF DACs. - Stefan Trampitsch; Jovan Markovic; Patrick Obmann; Jonas Fritzin; Jan Zaleski; Christian Mayer; Michael Fulde; Harald Pretl; Andreas Springer; Mario Huemer (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Fully-digital transmitter architectures and circuits for the next generation of wireless communications. - Michael Kalcher; Michael Fulde; Daniel Gruber (Elektrotech. Informationstechnik, 2018)