SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC. - Michael Gautschi; Michael Muehlberghuber; Andreas Traber; Sven Stucki; Matthias Baer; Renzo Andri; Luca Benini; Beat Muheim; Hubert Kaeslin (ASAP, 2014)

Customizing an open source processor to fit in an ultra-low power cluster with a shared L1 memory. - Michael Gautschi; Davide Rossi; Luca Benini (ACM Great Lakes Symposium on VLSI, 2014)

Exploring multi-banked shared-L1 program cache on ultra-low power, tightly coupled processor clusters. - Igor Loi; Davide Rossi; Germain Haugou; Michael Gautschi; Luca Benini (Conf. Computing Frontiers, 2015)

PULP: A parallel ultra low power platform for next generation IoT applications. - Davide Rossi; Francesco Conti 001; Andrea Marongiu; Antonio Pullini; Igor Loi; Michael Gautschi; Giuseppe Tagliavini; Alessandro Capotondi; Philippe Flatresse; Luca Benini (Hot Chips Symposium, 2015)

Tailoring instruction-set extensions for an ultra-low power tightly-coupled cluster of OpenRISC cores. - Michael Gautschi; Andreas Traber; Antonio Pullini; Luca Benini; Michele Scandale; Alessandro Di Federico; Michele Beretta 002; Giovanni Agosta (VLSI-SoC, 2015)

Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters. - Michael Schaffner; Michael Gautschi; Frank K. Gürkaynak; Luca Benini (ARITH, 2016)

193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing. - Davide Rossi; Antonio Pullini; Igor Loi; Michael Gautschi; Frank Kagan Gürkaynak; Adam Teman; Jeremy Constantin; Andreas Burg 001; Ivan Miro Panades; Edith Beigné; Fabien Clermidy; Fady Abouzeid; et al. (COOL Chips, 2016)

High-efficiency logarithmic number unit design based on an improved cotransformation scheme. - Youri Popoff; Florian Scheidegger; Michael Schaffner; Michael Gautschi; Frank K. Gürkaynak; Luca Benini (DATE, 2016)

Approximate 32-bit floating-point unit design with 53% power-area product reduction. - Vincent Camus; Jeremy Schlachter; Christian C. Enz; Michael Gautschi; Frank K. Gürkaynak (ESSCIRC, 2016)

A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision. - Antonio Pullini; Francesco Conti 001; Davide Rossi; Igor Loi; Michael Gautschi; Luca Benini (ISCAS, 2016)

4.6 A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster. - Michael Gautschi; Michael Schaffner; Frank K. Gürkaynak; Luca Benini (ISSCC, 2016)

Approximate DIV and SQRT instructions for the RISC-V ISA: An efficiency vs. accuracy analysis. - Lei Li; Michael Gautschi; Luca Benini (PATMOS, 2017)

Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications. - Pasquale Davide Schiavone; Francesco Conti 001; Davide Rossi; Michael Gautschi; Antonio Pullini; Eric Flamand; Luca Benini (PATMOS, 2017)

An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster. - Michael Gautschi; Michael Schaffner; Frank K. Gürkaynak; Luca Benini (IEEE J. Solid State Circuits, 2017)

Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster. - Davide Rossi; Antonio Pullini; Igor Loi; Michael Gautschi; Frank Kagan Gürkaynak; Adam Teman; Jeremy Constantin; Andreas Burg 001; Ivan Miro Panades; Edith Beigné; Fabien Clermidy; Philippe Flatresse; et al. (IEEE Micro, 2017)

An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics. - Francesco Conti 001; Robert Schilling; Pasquale Davide Schiavone; Antonio Pullini; Davide Rossi; Frank Kagan Gürkaynak; Michael Muehlberghuber; Michael Gautschi; Igor Loi; Germain Haugou; Stefan Mangard; Luca Benini (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices. - Michael Gautschi; Pasquale Davide Schiavone; Andreas Traber; Igor Loi; Antonio Pullini; Davide Rossi; Eric Flamand; Frank K. Gürkaynak; Luca Benini (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Design of energy-efficient processing elements for near-threshold parallel computing. - Michael Gautschi (Hartung-Gorre Verlag, 2017)

A Heterogeneous Multicore System on Chip for Energy Efficient Brain Inspired Computing. - Antonio Pullini; Francesco Conti 001; Davide Rossi; Igor Loi; Michael Gautschi; Luca Benini (IEEE Trans. Circuits Syst. II Express Briefs, 2018)