Analysis of wire bond and metallization degradation mechanisms in DMOS power transistors stressed under thermal overload conditions. - Thomas Detzel; Michael Glavanovics; Karin Weber (Microelectron. Reliab., 2004)

Flexible active cycle stress testing of smart power switches. - Michael Glavanovics; Helmut Köck; Vladimír Kosel; Tobias Smorodin (Microelectron. Reliab., 2007)

System level modeling of smart power switches using SystemC-AMS for digital protection concept verification. - Hans-Peter Kreuter; Vladimír Kosel; Michael Glavanovics; Robert Illing (BMAS, 2009)

IR thermography and FEM simulation analysis of on-chip temperature during thermal-cycling power-metal reliability testing using in situ heated structures. - Helmut Köck; Vladimír Kosel; Christian Djelassi; Michael Glavanovics; Dionyz Pogany (Microelectron. Reliab., 2009)

Non-linear thermal modeling of DMOS transistor and validation using electrical measurements and FEM simulations. - Vladimír Kosel; Robert Illing; Michael Glavanovics; Alexander Satka (Microelectron. J., 2010)

Applying Bayesian mixtures-of-experts models to statistical description of smart power semiconductor reliability. - Olivia Bluder; Michael Glavanovics; Jürgen Pilz (Microelectron. Reliab., 2011)

Improved thermal management of low voltage power devices with optimized bond wire positions. - Helmut Köck; Christian Djelassi; Stefano de Filippis; Robert Illing; Michael Nelhiebel; Markus Ladurner; Michael Glavanovics; Dionyz Pogany (Microelectron. Reliab., 2011)

A reliable technology concept for active power cycling to extreme temperatures. - Michael Nelhiebel; Robert Illing; Christoph Schreiber; S. Wöhlert; S. Lanzerstorfer; Markus Ladurner; C. Kadow; Stefan Decker; Donald Dibra; H. Unterwalcher; M. Rogalli; W. Robl; et al. (Microelectron. Reliab., 2011)

Modeling of highly anisotropic microstructures for electro-thermal simulations of power semiconductor devices. - Stefano de Filippis; Helmut Köck; Michael Nelhiebel; Vladimír Kosel; Stefan Decker; Michael Glavanovics; Andrea Irace (Microelectron. Reliab., 2012)

Distributed power semiconductor stress test & measurement architecture. - Benjamin Steinwender; Sascha Einspieler; Michael Glavanovics; Wilfried Elmenreich (INDIN, 2013)

Executable test definition for a state machine driven embedded test controller module. - Benjamin Steinwender; Michael Glavanovics; Wilfried Elmenreich (INDIN, 2015)

A common hard-failure mechanism in GaN HEMTs in accelerated switching and single-pulse short-circuit tests. - D. Wieland; S. Ofner; Manuel Stabentheiner; Boris Butej; Christian Koller; J. Sun; Andrea Minetto; Korbinian Reiser; Oliver Häberlen; Michael Nelhiebel; Michael Glavanovics; Dionyz Pogany; et al. (IRPS, 2023)