A multistep A/D converter family with efficient architecture. - Michael K. Mayes; Sing W. Chin (IEEE J. Solid State Circuits, 1989)

Design techniques for a compatible single and dual supply analog cell library. - Edison Fong; Nghiem Nguyen; Michael K. Mayes; Emmy Denton (IEEE J. Solid State Circuits, 1993)

A 200 mW, 1 Msample/s, 16-b pipelined A/D converter with on-chip 32-b microcontroller. - Michael K. Mayes; Sing W. Chin (IEEE J. Solid State Circuits, 1996)

A low-power 1 MHz, 25 mW 12-bit time-interleaved analog-to-digital converter. - Michael K. Mayes; Sing W. Chin; Lee L. Stoian (IEEE J. Solid State Circuits, 1996)