Layout-Accurate Design and Implementation of a High-Throughput Interconnection Network for Single-Chip Parallel Processing. - Aydin O. Balkan; Michael N. Horak; Gang Qu 001; Uzi Vishkin (Hot Interconnects, 2007)

A Low-Overhead Asynchronous Interconnection Network for GALS Chip Multiprocessors. - Michael N. Horak; Steven M. Nowick; Matthew Carlberg; Uzi Vishkin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)