Memories: A Survey of Their Secure Uses in Smart Cards. - Michael Neve; Eric Peeters; David Samyde; Jean-Jacques Quisquater (IEEE Security in Storage Workshop, 2003)

XTR Implementation on Reconfigurable Hardware. - Eric Peeters; Michael Neve; Mathieu Ciet (CHES, 2004)

Parallel FPGA Implementation of RSA with Residue Number Systems - Can side-channel threats be avoided? - Extended version. - Mathieu Ciet; Michael Neve; Eric Peeters; Jean-Jacques Quisquater (IACR Cryptol. ePrint Arch., 2004)

A refined look at Bernstein's AES side-channel analysis. - Michael Neve; Jean-Pierre Seifert; Zhenghong Wang (AsiaCCS, 2006)

Advances on Access-Driven Cache Attacks on AES. - Michael Neve; Jean-Pierre Seifert (Selected Areas in Cryptography, 2006)

Software mitigations to hedge AES against cache-based software side channel vulnerabilities. - Ernie Brickell; Gary Graunke; Michael Neve; Jean-Pierre Seifert (IACR Cryptol. ePrint Arch., 2006)

Cache-based vulnerabilities and spam analysis. - Michael Neve (2006)

An Analytical Model for Time-Driven Cache Attacks. - Kris Tiri; Onur Aciiçmez; Michael Neve; Flemming Andersen (FSE, 2007)

On the complexity of side-channel attacks on AES-256 - methodology and quantitative results on cache attacks. - Michael Neve; Kris Tiri (IACR Cryptol. ePrint Arch., 2007)