Hysteresis in electronic circuits: A circuit theorist's perspective. - Michael Peter Kennedy; Leon O. Chua (Int. J. Circuit Theory Appl., 1991)

Bispectral Analysis of Chua's Circuit. - Steve Elgar; Michael Peter Kennedy (Chua's Circuit, 1993)

Digital signal Processor-based Investigation of Chua's Circuit family. - Michael Peter Kennedy; Chai Wah Wu; Stanley Pau; James Tow (Chua's Circuit, 1993)

Synthesis of continuous three-segment voltage-controlled piecewise-linear resistors for Chua's circuit family using operational amplifiers, diodes and linear resistors. - Michael Peter Kennedy (Int. J. Circuit Theory Appl., 1993)

Bispectral Analysis of Chua's Circuit. - Steve Elgar; Michael Peter Kennedy (J. Circuits Syst. Comput., 1993)

Digital Signal Processor-Based Investigation of Chua's Circuit Family. - Michael Peter Kennedy; Chai Wah Wu; Stanley Pau; James Tow (J. Circuits Syst. Comput., 1993)

High frequency RC chaos generator. - Ahmed S. Elwakil; Michael Peter Kennedy (ICECS, 1998)

Design equations and baseband model for double-sampling phase-locked loop. - Géza Kolumbán; Bela A. Frigyik; Michael Peter Kennedy (ICECS, 1999)

Ultra-fast simulator developed in Matlab environment to evaluate multipath performance of FM-DCSK RF system. - Géza Kolumbán; Gábor Kis; Michael Peter Kennedy; Gerard Baldwin (ICECS, 1999)

Classification of steady-state behavior of the Colpitts oscillator. - Gian Mario Maggio; Michael Peter Kennedy (ICECS, 1999)

Behavioral modeling of charge pump phase locked loops. - Pascal Acco; Michael Peter Kennedy; Christian Mira; Brian Morley; Bela A. Frigyik (ISCAS (1), 1999)

Simulation of the multipath performance of FM-DCSK digital communications using chaos. - Michael Peter Kennedy; Géza Kolumbán; Gábor Kis (ISCAS (4), 1999)

Enhanced versions of DCSK and FM-DCSK data transmission systems. - Géza Kolumbán; Zoltán Jakó; Michael Peter Kennedy (ISCAS (4), 1999)

Chaotic Oscillator Configuration Using a Frequency Dependent Negative Resistor. - Ahmed S. Elwakil; Michael Peter Kennedy (J. Circuits Syst. Comput., 1999)

A rigorous exposition of the LEMMA method for analog and mixed-signal testing. - Adrian Wrixon; Michael Peter Kennedy (IEEE Trans. Instrum. Meas., 1999)

Incorporation of Hard-Fault-Coverage in Model-Based Testing of Mixed-Signal ICs. - Carsten Wegener; Michael Peter Kennedy (DATE, 2000)

A system for chaos generation and its implementation in monolithic form. - Ahmed S. Elwakil; Khaled N. Salama; Michael Peter Kennedy (ISCAS, 2000)

Determination of main system parameters of FM-DCSK telecommunications system. - Michael Peter Kennedy (ISCAS, 2000)

Frequency domain analysis of double sampling phase-locked loop. - Géza Kolumbán; Bela A. Frigyik; Michael Peter Kennedy (ISCAS, 2000)

Model-based testing of high-resolution ADCs. - Carsten Wegener; Michael Peter Kennedy (ISCAS, 2000)

Generic RC realizations of Chua's Circuit. - Ahmed S. Elwakil; Michael Peter Kennedy (Int. J. Bifurc. Chaos, 2000)

The Colpitts oscillator: Families of periodic solutions and their bifurcations. - Oscar De Feo; Gian Mario Maggio; Michael Peter Kennedy (Int. J. Bifurc. Chaos, 2000)

Chaotic Modulation for Robust Digital Communications over Multipath Channels. - Michael Peter Kennedy; Géza Kolumbán; Gábor Kis (Int. J. Bifurc. Chaos, 2000)

Systematic realization of a class of hysteresis chaotic oscillators. - Ahmed S. Elwakil; Michael Peter Kennedy (Int. J. Circuit Theory Appl., 2000)

Chua's circuit decomposition: a systematic design approach for chaotic oscillators. - Ahmed S. Elwakil; Michael Peter Kennedy (J. Frankl. Inst., 2000)

Digital communications using chaos. - Michael Peter Kennedy; Géza Kolumbán (Signal Process., 2000)

Recent results for chaotic modulation schemes. - Géza Kolumbán; Michael Peter Kennedy (ISCAS (3), 2001)

Process Deviations and Spot Defects: Two Aspects of Test and Test Development for Mixed-Signal Circuits. - Carsten Wegener; Michael Peter Kennedy; Bernd Straube (J. Electron. Test., 2001)

Implementation of Model-Based Testing for Medium to High-Resolution Nyquist-Rate ADCs. - Carsten Wegener; Michael Peter Kennedy (ITC, 2002)

An equation for Generating Chaos and its monolithic Implementation. - Ahmed S. Elwakil; Khaled N. Salama; Michael Peter Kennedy (Int. J. Bifurc. Chaos, 2002)

Experimental Verification of the Butterfly Attractor in a Modified Lorenz System. - Serdar Özoguz; Ahmed S. Elwakil; Michael Peter Kennedy (Int. J. Bifurc. Chaos, 2002)

Chaotic communications with correlator receivers: theory and performance limits. - Géza Kolumbán; Michael Peter Kennedy; Zoltán Jakó; Gábor Kis (Proc. IEEE, 2002)

Linear Model-Based Error Identification and Calibration for Data Converters. - Carsten Wegener; Michael Peter Kennedy (DATE, 2003)

Method of reducing contactor effect when testing high-precision ADCs. - Gwenolé Maugard; Carsten Wegener; Tom O'Dwyer; Michael Peter Kennedy (ITC, 2003)

A Four-Wing Butterfly Attractor from a Fully Autonomous System. - Ahmed S. Elwakil; Serdar Özoguz; Michael Peter Kennedy (Int. J. Bifurc. Chaos, 2003)

A technique to reduce flicker noise up-conversion in CMOS LC voltage-controlled oscillators. - Hyman Shanan; Michael Peter Kennedy (ESSCIRC, 2004)

Testing ADCs for static and dynamic INL - killing two birds with one stone. - Carsten Wegener; Michael Peter Kennedy (Comput. Stand. Interfaces, 2004)

A general method to predict the amplitude of oscillation in nearly sinusoidal oscillators. - Gian Mario Maggio; Oscar De Feo; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Linear model-based testing of ADC nonlinearities. - Carsten Wegener; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Observations on the relationship between energy transfer efficiency and phase noise in an LC oscillator. - David Murphy; Min Qu; John Buckley; Michael Peter Kennedy (ECCTD, 2005)

Influence of a "coupling factor" on the spectrum of a noisy oscillator. - Keith O'Donoghue; James P. Gleeson; Michael Peter Kennedy (ECCTD, 2005)

A fast and simple implementation of Chua's oscillator using a "cubic-like" Chua diode. - Keith O'Donoghue; Michael Peter Kennedy; Peadar Forbes (ECCTD, 2005)

The Devil's Staircase as a method of comparing injection-locked frequency divider topologies. - David O'Neill; David Bourke; Michael Peter Kennedy (ECCTD, 2005)

Accurate modeling and experimental validation of an injection-locked frequency divider. - David O'Neill; David Bourke; Zhipeng Ye; Michael Peter Kennedy (ECCTD, 2005)

Comments on the effectiveness of the Szabo and Kolumban solution to false lock in sampling PLL frequency synthesizer. - Michael Parle; Michael Peter Kennedy (ECCTD, 2005)

Innovation to overcome limitations of test equipment. - Carsten Wegener; Michael Peter Kennedy (ECCTD, 2005)

Overcoming Test Setup Limitations by Applying Model-Based Testing to High-Precision ADCs. - Carsten Wegener; Michael Peter Kennedy (J. Electron. Test., 2005)

On the Approximate One-d Map in Chua's oscillator. - Peadar Forbes; Sarah Boyle; Keith O'Donoghue; Michael Peter Kennedy (Int. J. Bifurc. Chaos, 2005)

A Fast and Simple Implementation of Chua's oscillator with cubic-like Nonlinearity. - Keith O'Donoghue; Michael Peter Kennedy; Peadar Forbes; Min Qu; Stephanie Jones (Int. J. Bifurc. Chaos, 2005)

Influence of noise intensity on the spectrum of an oscillator. - Rabi Sankar Swain; James P. Gleeson; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

Use of the Step Invariant Transform to Design a 2nd Order Continuous Time Complex Sigma-Delta ADC. - Niall Duncan; Anthony Dunne; Michael Peter Kennedy (ICECS, 2006)

The optimum power conversion efficiency and associated gain of an LC CMOS oscillator. - David Murphy; Michael Peter Kennedy; John Buckley; Min Qu (ISCAS, 2006)

Locking range analysis for injection-locked frequency dividers. - Zhipeng Ye; Tao Xu; Michael Peter Kennedy (ISCAS, 2006)

Test Development Through Defect and Test Escape Level Estimation for Data Converters. - Carsten Wegener; Michael Peter Kennedy (J. Electron. Test., 2006)

Optimizing the design of an injection-locked frequency divider by means of nonlinear analysis. - Mohammad M. Ghahramani; Saeid Daneshgar; Michael Peter Kennedy; Oscar De Feo (ECCTD, 2007)

A novel dual-loop multi-phase frequency synthesizer. - Zhipeng Ye; Wenbin Chen; Michael Peter Kennedy (ECCTD, 2007)

Hard-Fault Detection and Diagnosis During the Application of Model-Based Data Converter Testing. - Carsten Wegener; Michael Peter Kennedy (J. Electron. Test., 2007)

Modeling and Simulation of Delta-Sigma Fractional-N PLL Frequency Synthesizer in Verilog-AMS. - Zhipeng Ye; Wenbin Chen; Michael Peter Kennedy (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Maximum Sequence Length MASH Digital Delta-Sigma Modulators. - Kaveh Hosseini; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Mathematical Analysis of a Prime Modulus Quantizer MASH Digital Delta-Sigma Modulator. - Kaveh Hosseini; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Reduced Complexity MASH Delta-Sigma Modulator. - Zhipeng Ye; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Design methodology for a divide-by-4 LC injection-locked frequency divider based on nonlinear analysis. - Saeid Daneshgar; Michael Peter Kennedy (ICECS, 2008)

Design methodology for a dithered reduced complexity Digital MASH Delta-Sigma Modulator. - Zhipeng Ye; Michael Peter Kennedy (ICECS, 2008)

Statistical Properties of First-Order Bang-Bang PLL With Nonzero Loop Delay. - Byungjin Chun; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Architectures for Maximum-Sequence-Length Digital Delta-Sigma Modulators. - Kaveh Hosseini; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A spur-free MASH digital delta-sigma modulator with higher order shaped dither. - Brian Fitzgibbon; Kieran O'Neill; Andrew Grannell; Ciarán Horgan; Zhipeng Ye; Kaveh Hosseini; Michael Peter Kennedy (ECCTD, 2009)

Calculation of cycle lengths in MASH 1-2-2 digital delta sigma modulators with a constant input. - Kieran O'Neill; Brian Fitzgibbon; Kaveh Hosseini; Michael Peter Kennedy (ECCTD, 2009)

Hardware Reduction in Digital Delta-Sigma Modulators Via Error Masking - Part I: MASH DDSM. - Zhipeng Ye; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Hardware Reduction in Digital Delta-Sigma Modulators Via Error Masking - Part II: SQ-DDSM. - Zhipeng Ye; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter. - Francesco Brandonisio; Michael Peter Kennedy; Franco Maloberti (ICECS, 2010)

Calculation of cycle lengths in higher-order MASH DDSMs with constant inputs. - Brian Fitzgibbon; Michael Peter Kennedy (ICECS, 2010)

On the synchronization condition of second-harmonic coupled QVCOs. - Antonio Buonomo; Michael Peter Kennedy; Alessandro Lo Schiavo (ISCAS, 2010)

A qualitative analysis of a complementary differential LC injection-locked frequency divider based on direct injection. - Saeid Daneshgar; Michael Peter Kennedy (ISCAS, 2010)

Calculation of the cycle length in a HK-MASH DDSM with multilevel quantizers. - Brian Fitzgibbon; Michael Peter Kennedy (ISCAS, 2010)

Estimating the locking range of analog dividers through a phase-domain macromodel. - Paolo Maffezzoni; Dario D'Amore; Saeid Daneshgar; Michael Peter Kennedy (ISCAS, 2010)

Observations Concerning the Locking Range in a Complementary Differential LC Injection-Locked Frequency Divider - Part I: Qualitative Analysis. - Saeid Daneshgar; Oscar De Feo; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Prediction of the Spectrum of a Digital Delta-Sigma Modulator Followed by a Polynomial Nonlinearity. - Kaveh Hosseini; Michael Peter Kennedy; Stephen H. Lewis; Bernard C. Levy (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Analysis and Design of Injection-Locked Frequency Dividers by Means of a Phase-Domain Macromodel. - Paolo Maffezzoni; Dario D'Amore; Saeid Daneshgar; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Phenomenological study of an injection-locked CMOS LC frequency divider with direct injection. - Michael Peter Kennedy; Xi Dong; Hongjia Mo (ECCTD, 2011)

Experimental characterization of Arnold tongues in injection-locked CMOS LC frequency dividers with tail and direct injection. - Michael Peter Kennedy; Hongjia Mo; Xi Dong (ECCTD, 2011)

First order noise shaping in all digital PLLs. - Francesco Brandonisio; Michael Peter Kennedy (ISCAS, 2011)

A novel implementation of dithered digital delta-sigma modulators via bus-splitting. - Brian Fitzgibbon; Michael Peter Kennedy; Franco Maloberti (ISCAS, 2011)

On the Synchronization Condition for Superharmonic Coupled QVCOs. - Antonio Buonomo; Michael Peter Kennedy; Alessandro Lo Schiavo (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Observations Concerning the Locking Range in a Complementary Differential LC Injection-Locked Frequency Divider - Part II: Design Methodology. - Saeid Daneshgar; Oscar De Feo; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Calculation of Cycle Lengths in Higher Order Error Feedback Modulators With Constant Inputs. - Brian Fitzgibbon; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

Hardware Reduction in Digital Delta-Sigma Modulators Via Bus-Splitting and Error Masking - Part I: Constant Input. - Brian Fitzgibbon; Michael Peter Kennedy; Franco Maloberti (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

A Spur-Free MASH DDSM With High-Order Filtered Dither. - Brian Fitzgibbon; Sudhakar Pamarti; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

Observations Concerning the Generation of Spurious Tones in Digital Delta-Sigma Modulators Followed by a Memoryless Nonlinearity. - Kaveh Hosseini; Brian Fitzgibbon; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

A "divide-by-odd number" direct injection CMOS LC injection-locked frequency divider. - Masfandyar Asfandyar Awan; Malik Summair Asghar; Michael Peter Kennedy (ICECS, 2012)

A fast charge pump PLL using a bang-bang frequency comparator with dead zone. - Vahideh Sadat Sadeghi; Hossein Miar Naimi; Michael Peter Kennedy (ISCAS, 2012)

Hardware Reduction in Digital Delta-Sigma Modulators via Bus-Splitting and Error Masking - Part II: Non-Constant Input. - Brian Fitzgibbon; Michael Peter Kennedy; Franco Maloberti (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

An LC CMOS injection-locked frequency divider for divide-by-two and divide-by-three operation. - Malik Summair Asghar; Muhammad Asfandyar Awan; Zhen Huang; Wenyuan Li; Michael Peter Kennedy; Antonio Buonomo; Alessandro Lo Schiavo (ECCTD, 2013)

Implementation of a pulse-holding Time-to-Digital Converter on an FPGA. - Francesco Brandonisio; Alberto Prodomo; Michael Peter Kennedy; Ettore Napoli (ECCTD, 2013)

A high-throughput spur-free hybrid nested bus-splitting/HK-MASH digital delta-sigma modulator. - Hongjia Mo; Michael Peter Kennedy (ECCTD, 2013)

Experimental validation of DAC with nested bus-splitting EFM4 DDSM. - Hongjia Mo; Michael Peter Kennedy; Vincent O'Brien; Brendan Mullane (ECCTD, 2013)

High speed, high accuracy fractional-N frequency synthesizer using nested mixed-radix digital Δ-Σ modulators. - Michael Peter Kennedy; Brian Fitzgibbon; Austin Harney; Hyman Shanan; Mike Keaveney (ESSCIRC, 2013)

Spurious tones in digital delta sigma modulators with pseudorandom dither. - Michael Peter Kennedy; Brian Fitzgibbon; Kerry Dobmeier (ISCAS, 2013)

A CMOS Injection-Locked Frequency Divider Optimized for Divide-by-Two and Divide-by-Three Operation. - Antonio Buonomo; Alessandro Lo Schiavo; Muhammad Asfandyar Awan; Malik Summair Asghar; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

The Role of Charge Pump Mismatch in the Generation of Integer Boundary Spurs in Fractional-N Frequency Synthesizers: Why Worse Can Be Better. - Vahideh Sadat Sadeghi; Hossein Miar Naimi; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

Comments on efficient dithering in digital delta-sigma modulator. - Hongjia Mo; Michael Peter Kennedy (ICECS, 2014)

0.3-4.3 GHz Frequency-Accurate Fractional-N Frequency Synthesizer With Integrated VCO and Nested Mixed-Radix Digital Δ-Σ Modulator-Based Divider Controller. - Michael Peter Kennedy; Hongjia Mo; Brian Fitzgibbon; Austin Harney; Hyman Shanan; Mike Keaveney (IEEE J. Solid State Circuits, 2014)

Effective (Spur-Free) dithering of digital delta-sigma modulators with pseudorandom dither. - Hongjia Mo; Michael Peter Kennedy (ECCTD, 2015)

The noise and spur delusion in fractional-N frequency synthesizer design. - Michael Peter Kennedy; Hongjia Mo; Zhida Li; Guosheng Hu; Paolo Scognamiglio; Ettore Napoli (ISCAS, 2015)

Spurious tones in digital delta-sigma modulators resulting from pseudorandom dither. - Michael Peter Kennedy; Hongjia Mo; Brian Fitzgibbon (J. Frankl. Inst., 2015)

On the statistical properties of phase noise in Fractional-N frequency synthesizers using successive requantizers. - Yann Donnelly; Michael Peter Kennedy (ICECS, 2016)

Comments on "folding of phase noise spectra in charge-pump phase-locked loops induced by frequency division". - Dawei Mai; Hongjia Mo; Michael Peter Kennedy (ICECS, 2016)

Yet another spur mechanism in a charge-pump based Fractional-N PLL. - Aidan Marnane; Valerio Marotta; Michael Peter Kennedy (ICECS, 2016)

Maximizing the fundamental period of a dithered digital delta-sigma modulator with constant input. - Hongjia Mo; Xiao Tan; Michael Peter Kennedy (ICECS, 2016)

A method to quantify the dependence of spur heights on offset current in a CP-PLL. - Michael Peter Kennedy; Hongjia Mo; Zhen Huang; Joao Paulo Lana (ISCAS, 2016)

Comparative analysis of differential colpitts and cross-coupled VCOs in 180 nm Si-Ge HBT technology. - Valerio Marotta; Giuseppe Macera; Michael Peter Kennedy; Ettore Napoli (ISCAS, 2016)

Comparison of analytical predictions of the noise floor due to static charge pump mismatch in fractional-n frequency synthesizers. - Hongjia Mo; Guosheng Hu; Michael Peter Kennedy (ISCAS, 2016)

Masked Dithering of MASH Digital Delta-Sigma Modulators with Constant Inputs Using Linear Feedback Shift Registers. - Hongjia Mo; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Nonlinearity-induced spurious tones and noise in digitally-assisted frequency synthesizers. - Michael Peter Kennedy; Hongjia Mo; Dawei Mai (ISCAS, 2017)

Influence of Initial Conditions on the Fundamental Periods of LFSR-Dithered MASH Digital Delta-Sigma Modulators With Constant Inputs. - Hongjia Mo; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Masked Dithering of MASH Digital Delta-Sigma Modulators With Constant Inputs Using Multiple Linear Feedback Shift Registers. - Hongjia Mo; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Novel Approach to Modelling Electromechanical Coupling and Testing its Self-Consistency in Micro-Scale Kinetic Electromagnetic Energy Harvesters. - Andrii Sokolov; Dhiman Mallick; Saibal Roy; Michael Peter Kennedy; Elena Blokhina (ICECS, 2018)

High-Speed Nested Cascaded MASH Digital Delta-Sigma Modulator-Based Divider Controller. - Yann Donnelly; Hongjia Mo; Michael Peter Kennedy (ISCAS, 2018)

A Design Method for Nested MASH-SQ Hybrid Divider Controllers for Fractional-N Frequency Synthesizers. - Dawei Mai; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Observations and Analysis of Wandering Spurs in MASH-Based Fractional-N Frequency Synthesizers. - Dawei Mai; Hongjia Mo; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

An Eight-Phase 40GHz RTWO in 28nm CMOS with Phase Noise Reduction Via Head and Tail Filtering. - Salvatore Galeone; Michael Peter Kennedy; Karim Ahmed; Hyman Shanan; Mike Keaveney (ICECS, 2019)

Nonlinearity-Induced Spurs in Fractional-N Frequency Synthesizers: State of the Art. - Michael Peter Kennedy (ICECS, 2019)

MASH DDSM-Induced Spurs in a Fractional-N Frequency Synthesizer. - Dawei Mai; Adil Dahlan; Michael Peter Kennedy (ICECS, 2019)

Observations concerning "Horn Spurs" in a MASH-based Fractional-N CP-PLL. - Valerio Mazzaro; Michael Peter Kennedy (ICECS, 2019)

Method of Equivalent Currents for the Calculation of Magnetic Fields in Inductors and Magnets with Application to Electronics. - Andrii Sokolov; Michael Peter Kennedy; Elena Blokhina (ISCAS, 2019)

4.48GHz 0.18μm SiGe BiCMOS Exact-Frequency Fractional-N Frequency Synthesizer with Spurious-Tone Suppression Yielding a -80dBc In-Band Fractional Spur. - Michael Peter Kennedy; Yann Donnelly; James Breslin; Stefano Tulisi; Sanganagouda Patil; Ciaran Curtin; Stephen Brookes; Brian Shelly; Patrick Griffin; Michael Keaveney (ISSCC, 2019)

Wandering Spurs in MASH 1-1 Delta-Sigma Modulators. - Yann Donnelly; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Prediction of Phase Noise and Spurs in a Nonlinear Fractional-N Frequency Synthesizer. - Yann Donnelly; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Curious Result concerning Spur Generation in MASH 1-1-1 based Fractional-N CP-PLLs with a Second-Order Nonlinearity. - Valerio Mazzaro; Michael Peter Kennedy (ICECS, 2020)

Near-Limit Kinetic Energy Harvesting From Arbitrary Acceleration Waveforms: Feasibility Study by the Example of Human Motion. - Andrii Sokolov; Dimitri Galayko; Michael Peter Kennedy; Elena Blokhina (IEEE Access, 2020)

Jitter Minimization in Digital PLLs with Mid-Rise TDCs. - Luca Avallone; Michael Peter Kennedy; Saleh Karman; Carlo Samori; Salvatore Levantino (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

Analysis of Wandering Spur Patterns in a Fractional-N Frequency Synthesizer With a MASH-Based Divider Controller. - Dawei Mai; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

Influence of Initial Condition on Wandering Spur Pattern in a MASH-Based Fractional-N Frequency Synthesizer. - Dawei Mai; Michael Peter Kennedy (IEEE Trans. Circuits Syst., 2020)

Mitigation of "Horn Spurs" in a MASH-Based Fractional-N CP-PLL. - Valerio Mazzaro; Michael Peter Kennedy (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Modelling and Verification of Nonlinear Electromechanical Coupling in Micro-Scale Kinetic Electromagnetic Energy Harvesters. - Andrii Sokolov; Dhiman Mallick; Saibal Roy; Michael Peter Kennedy; Elena Blokhina (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

Experimental Verification of Wandering Spur Suppression Technique in a 4.9 GHz Fractional-N Frequency Synthesizer. - Dawei Mai; Yann Donnelly; Michael Peter Kennedy; Stefano Tulisi; James Breslin; Patrick Griffin; Michael Connor; Stephen Brookes; Brian Shelly; Michael Keaveney (ESSCIRC, 2021)

A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter. - Mario Mercandelli; Alessio Santiccioli; Simone Mattia Dartizio; Abanob Shehata; Francesco Tesolin; Saleh Karman; Luca Bertulessi; Francesco Buccoleri; Luca Avallone; Angelo Parisi; Andrea Leonardo Lacaita; Michael Peter Kennedy; et al. (ISSCC, 2021)

32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays. - Alessio Santiccioli; Mario Mercandelli; Simone Mattia Dartizio; Francesco Tesolin; Saleh Karman; Abanob Shehata; Luca Bertulessi; Francesco Buccoleri; Luca Avallone; Angelo Parisi; Dmytro Cherniak; Andrea L. Lacaita; et al. (ISSCC, 2021)

A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLs. - Luca Avallone; Mario Mercandelli; Alessio Santiccioli; Michael Peter Kennedy; Salvatore Levantino; Carlo Samori (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

An Algorithm for Implementing a Modulator Whose Output is Spur-Free After Nonlinear Distortion. - Yann Donnelly; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

MASH-Based Divider Controllers for Mitigation of Wandering Spurs in a Fractional-N Frequency Synthesizer. - Dawei Mai; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Spur Immunity in MASH-Based Fractional-N CP-PLLs With Polynomial Nonlinearities. - Valerio Mazzaro; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Folded Noise Prediction in Nonlinear Fractional-N Frequency Synthesizers. - Valerio Mazzaro; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Wandering Spurs in MASH-Based Fractional-N Frequency Synthesizers - How They Arise and How to Get Rid of Them - Dawei Mai; Michael Peter Kennedy (Springer, 2022)

Immunity of ENOP-based Fractional-N Frequency Synthesizer to Wandering and Horn Spurs. - Valerio Mazzaro; Michael Peter Kennedy (PRIME, 2022)

A random pulse modulation approach to modeling the flicker and white noise of the charge pump of a fractional-N frequency synthesizer. - Xu Wang 039; Michael Peter Kennedy (Int. J. Circuit Theory Appl., 2022)

A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping. - Simone Mattia Dartizio; Francesco Tesolin; Mario Mercandelli; Alessio Santiccioli; Abanob Shehata; Saleh Karman; Luca Bertulessi; Francesco Buccoleri; Luca Avallone; Angelo Parisi; Andrea L. Lacaita; Michael Peter Kennedy; et al. (IEEE J. Solid State Circuits, 2022)

Wandering Spur Suppression in a 4.9-GHz Fractional-N Frequency Synthesizer. - Dawei Mai; Yann Donnelly; Michael Peter Kennedy; Stefano Tulisi; James Breslin; Patrick Griffin; Michael Connor; Stephen Brookes; Brian Shelly; Mike Keaveney (IEEE J. Solid State Circuits, 2022)

A Family of ΔΣ Modulators With High Spur Immunity and Low Folded Nonlinearity Noise When Used in Fractional- Frequency Synthesizers. - Valerio Mazzaro; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Nonlinearity-Induced Spurs in Fractional-N Frequency Synthesizers. - Michael Peter Kennedy; Valerio Mazzaro; Dawei Mai (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Further Insights into Spur Immunity in MASH-Based Fractional-N CP-PLLs with Polynomial Nonlinearities. - Xu Lu; Michael Peter Kennedy (ICECS, 2023)

Comparison of DTC-Related Spurs in Fractional-N Digital PLLs with MASH-and-ENOP-based Divider Controllers. - Xu Wang 039; Michael Peter Kennedy (ICECS, 2023)

Initial Condition-Dependent Spur Pattern Induced by Undithered MASH DDSM Divider Controller. - Dawei Mai; Michael Peter Kennedy (ISCAS, 2023)

Comparative Study of Linearized Analysis Frameworks for Mid-Rise TDCs. - Xu Wang 039; Michael Peter Kennedy (NEWCAS, 2023)

Linearized Analysis of Mid-Rise TDCs for Integer-N and Fractional-N Digital PLLs. - Xu Wang 039; Michael Peter Kennedy (NEWCAS, 2023)

MMSE Estimator for Linearized Analysis and SNR of ADCs Tested with Sinusoidal Inputs. - Xu Wang 039; Michael Peter Kennedy (PRIME, 2023)

Performance Limits of Fractional-N Digital PLLs with Mid-Rise TDCs. - Xu Wang 039; Michael Peter Kennedy (PRIME, 2023)

Optimized MASH-SR Divider Controller for Fractional-N Frequency Synthesizers. - Dawei Mai; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Enhanced Jitter Analysis and Minimization for Digital PLLs With Mid-Rise TDCs and its Impact on Output Phase Noise. - Xu Wang 039; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Insights Offered by Periodic Nonlinearity Noise Into Nonlinearity-Induced Fractional Spurs. - Xu Lu; Michael Peter Kennedy (ICM, 2024)

Comparison of DTC Segmentation Methods in Fractional-N Frequency Synthesizers. - Xu Wang 039; Michael Peter Kennedy (ISCAS, 2024)

10.4 A 45.5fs-Integrated-Random-Jitter and -75dBc-Integer-Boundary-Spur BiCMOS Fractional-N PLL with Suppression of Fractional, Horn, and Wandering Spurs. - Michael Peter Kennedy; Valerio Mazzaro; Stefano Tulisi; Micheál Scully; Niall McDermott; James Breslin (ISSCC, 2024)

The Curious Case of Seed-Related Fractional Spurs. - Michael Peter Kennedy; Xu Lu; Haoyang Shen; Sonia Srinivas (ISCAS, 2025)

What PNN Says About Spur Rolloff Rates in MASH-Based CP-PLLs With Polynomial Distortion. - Xu Lu; Michael Peter Kennedy (ISCAS, 2025)

Enhanced CppSim-Based Behavioral Simulator for Predicting Noise Floor and Spurs in Fractional-N Frequency Synthesizers. - Haoyang Shen; Michael Peter Kennedy (ISCAS, 2025)

Method to Determine Quantization-Related Parameters of the Digital-to-Time Converter in a Fractional-N Frequency Synthesizer. - Xu Wang 039; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

Analysis and Mitigation of Excess Phase Noise and Spurs in Digital-to-Time-Converter-Enhanced Fractional- N Frequency Synthesizers. - Xu Wang 039; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

Reconciliation of Statistical Approaches to Predicting Nonlinearity-Induced Spurs in Fractional-N Frequency Synthesizers. - Xu Lu; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

Linearized Analysis and Quantization Error Minimization for Mid-Rise TDCs: A Tutorial. - Xu Wang 039; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

Spurs in Fractional-N Frequency Synthesizers Resulting From Resolution Mismatch Between the Divider Controller and the DTC: Manifestations, Analysis, and Mitigation. - Xu Wang 039; Michael Peter Kennedy (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)