Towards GCC-based automatic soft-core customization. - Gerald Hempel; Christian Hochberger; Michael Raitza (FPL, 2012)

Influence of operating conditions on ring oscillator-based entropy sources in FPGAs. - Christian Hochberger; Changgong Li; Michael Raitza; Markus Vogt (FPL, 2012)

Influence of Magnetic Fields and X-Radiation on Ring Oscillators in FPGAs. - Michael Raitza; Markus Vogt; Christian Hochberger; Thilo Pionteck (IPDPS Workshops, 2014)

Reconfigurable nanowire transistors with multiple independent gates for efficient and programmable combinational circuits. - Jens Trommer; Andre Heinzig; Tim Baldauf; Thomas Mikolajick; Walter M. Weber; Michael Raitza; Marcus Völp (DATE, 2016)

RAW 2014: Random Number Generators on FPGAs. - Michael Raitza; Markus Vogt; Christian Hochberger; Thilo Pionteck (ACM Trans. Reconfigurable Technol. Syst., 2016)

Exploiting transistor-level reconfiguration to optimize combinational circuits. - Michael Raitza; Akash Kumar 001; Marcus Völp; Dennis Walter; Jens Trommer; Thomas Mikolajick; Walter M. Weber (DATE, 2017)

Technology mapping flow for emerging reconfigurable silicon nanowire transistors. - Shubham Rai; Michael Raitza; Akash Kumar 001 (DATE, 2018)

A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs. - Shubham Rai; Ansh Rupani; Dennis Walter; Michael Raitza; Andre Heinzig; Tim Baldauf; Jens Trommer; Christian Mayr 001; Walter M. Weber; Akash Kumar 001 (DATE, 2018)

A Hardware/Software Stack for Heterogeneous Systems. - Jerónimo Castrillón; Matthias Lieber; Sascha Klüppelholz; Marcus Völp; Nils Asmussen; Uwe Aßmann; Franz Baader; Christel Baier; Gerhard P. Fettweis; Jochen Fröhlich; Andrés Goens; Sebastian Haas; et al. (IEEE Trans. Multi Scale Comput. Syst., 2018)

Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors. - Shubham Rai; Jens Trommer; Michael Raitza; Thomas Mikolajick; Walter M. Weber; Akash Kumar 001 (IEEE Trans. Very Large Scale Integr. Syst., 2019)

DiSCERN: Distilling Standard-Cells for Emerging Reconfigurable Nanotechnologies. - Shubham Rai; Michael Raitza; Siva Satyendra Sahoo; Akash Kumar 001 (DATE, 2020)

Quantitative Characterization of Reconfigurable Transistor Logic Gates. - Michael Raitza; Steffen Märcker; Jens Trommer; Andre Heinzig; Sascha Klüppelholz; Christel Baier; Akash Kumar 001 (IEEE Access, 2020)

AMAH-Flex: A Modular and Highly Flexible Tool for Generating Relocatable Systems on FPGAs. - Najdet Charaf; Christoph Tietz; Michael Raitza; Akash Kumar 001; Diana Göhringer (FPT, 2021)

Metastability with Emerging Reconfigurable Transistors: Exploiting Ambipolarity for Throughput. - Abhiroop Bhattacharjee; Shubham Rai; Ansh Rupani; Michael Raitza; Akash Kumar 001 (VLSI-SoC, 2021)

END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator. - Shubham Rai; Nishant Gupta; Abhiroop Bhattacharjee; Ansh Rupani; Michael Raitza; Jens Trommer; Thomas Mikolajick; Akash Kumar 001 (VLSI-SoC (Selected Papers), 2021)

Exploring Standard-Cell Designs for Reconfigurable Nanotechnologies: A Formal Approach. - Michael Raitza; Steffen Märcker; Shubham Rai; Akash Kumar 001 (DATE, 2022)

Tutorial: How to Use Model Checking to Analyze Circuits at the Transistor Level. - Michael Raitza; Steffen Märcker (CODES+ISSS, 2023)

Formal Analysis of Camouflaged Reconfigurable Circuits. - Steffen Märcker; Michael Raitza; Shubham Rai; Giulio Galderisi; Thomas Mikolajick; Jens Trommer; Akash Kumar 001 (NEWCAS, 2023)